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STC62WV2568 반도체 회로 부품 판매점

Very Low Power/Voltage CMOS SRAM 256K X 8 bit



STC 로고
STC
STC62WV2568 데이터시트, 핀배열, 회로
www.DataSheet4U.com
STC
Very Low Power/Voltage CMOS SRAM
256K X 8 bit
STC62WV2568
„ FEATURES
• Wide Vcc operation voltage : 2.4V~5.5V
• Very low power consumption :
Vcc = 3.0V
C-grade : 22mA (@55ns) operating current
I- grade : 23mA (@55ns) operating current
C-grade : 17mA (@70ns) operating current
I- grade : 18mA (@70ns) operating current
0.3uA (Typ.) CMOS standby current
Vcc = 5.0V C-grade : 53mA (@55ns) operating current
I- grade : 55mA (@55ns) operating current
C-grade : 43mA (@70ns) operating current
I- grade : 45mA (@70ns) operating current
1.0uA (Typ.) CMOS standby current
• High speed access time :
-55 55ns
-70 70ns
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2, CE1, and OE options
„ DESCRIPTION
The STC62WV2568 is a high performance, very low power CMOS
Static Random Access Memory organized as 262,144 words by 8 bits
and operates from a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.3uA at 3.0V /25oC and maximum access time of 55ns at 3.0V /85oC.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The STC62WV2568 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The STC62WV2568 is available in DICE form, JEDEC standard 32 pin
450mil Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.
„ PRODUCT FAMILY
PRODUCT
FAMILY
OPERATING
TEMPERATURE
STC62WV2568DC
STC62WV2568TC
STC62WV2568STC
STC62WV2568SC
STC62WV2568DI
STC62WV2568TI
STC62WV2568STI
STC62WV2568SI
+0 O C to +70 O C
-40 O C to +85 O C
Vcc
RANGE
SPEED
( ns )
55ns :3.0~5.5V
70ns :2.7~5.5V
POWER DISSIPATION
STANDBY
( ICCSB1, Max )
Operating
( ICC, Max )
Vcc=3.0V
Vcc=5.0V
Vcc=3.0V
70ns
Vcc=5.0V
70ns
2.4V ~5.5V 55/70
3.0uA
DataSheet4U.com
2.4V ~ 5.5V 55/70
5.0uA
10uA
30uA
17mA
43mA
18mA
45mA
PKG TYPE
DICE
TSOP-32
STSOP-32
SOP-32
DICE
DataShee
TSOP-32
STSOP-32
SOP-32
„ PIN CONFIGURATIONS
„ BLOCK DIAGRAM
A11
A9
A8
A13
WE
CE2
A15
VCC
A17
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
STC62WV2568TC
STC62WV2568STC
STC62WV2568TI
STC62WV2568STI
32 OE
31 A10
30 CE1
29 DQ7
28 DQ6
27 DQ5
26 DQ4
25 DQ3
24 GND
23 DQ2
22 DQ1
21 DQ0
20 A0
19 A1
18 A2
17 A3
A17 1
32
A16 2
31
A14 3
30
A12 4
29
A7 5
28
A6 6
27
A5 7 STC62WV2568S 26
A4 8 STC62WV2568SI 25
A3 9
24
A2 10
23
A1 11
22
A0 12
21
DQ0
13
20
DQ1
14
19
DQ2
15
18
DataSheet4UGN.Dcom16
17
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
CE2
A13
A17
A15
A16
A14
A12
A7
A6
A5
A4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CE1
WE
OE
Vdd
Gnd
Address
Input
Buffer
20
Row
Decoder
1024
Memory Array
1024 x 2048
8
8
Control
Data
Input
Buffer
Data
Output
Buffer
2048
8 Column I/O
Write Driver
Sense Amp
8
256
Column Decoder
16
Address Input Buffer
A11 A9 A8 A3 A2 A1 A0 A10
STC International Limited. reserves the right to modify document contents without notice.
STC62WV2568
1
Revision 1.1
Jan. 2004


STC62WV2568 데이터시트, 핀배열, 회로
STCwww.DataSheet4U.com
„ PIN DESCRIPTIONS
Name
A0-A17 Address Input
CE1 Chip Enable 1 Input
CE2 Chip Enable 2 Input
WE Write Enable Input
OE Output Enable Input
DQ0-DQ7 Data Input/Output
Ports
Vcc
Gnd
STC62WV2568
Function
These 18 address inputs select one of the 262,144 x 8-bit words in the RAM
CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when
data read from or write to the device. If either chip enable is not active, the device is
deselected and is in a standby power mode. The DQ pins will be in the high
impedance state when the device is deselected.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impedance state when OE is inactive.
These 8 bi-directional ports are used to read data from or write data into the RAM.
Power Supply
Ground
et4U.com„ TRUTH TABLE
DataSheet4U.com
MODE
Not selected
(Power Down)
Output Disabled
Read
Write
WE
X
X
H
H
L
CE1 CE2
HX
XL
LH
LH
LH
OE
X
X
H
L
X
I/O OPERATION
High Z
High Z
D OUT
D IN
DataShee
Vcc CURRENT
ICCSB, I CCSB1
ICC
ICC
ICC
„ ABSOLUTE MAXIMUM RATINGS(1)
SYMBOL
VTERM
TBIAS
TSTG
PT
IOUT
PARAMETER
Terminal Voltage with
Respect to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current
RATING
-0.5 to
Vcc+0.5
-40 to +85
-60 to +150
1.0
20
UNITS
V
OC
OC
W
mA
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
DataSheetm4aUxi.mcuomm rating conditions for extended periods may affect
reliability.
„ OPERATING RANGE
RANGE
Commercial
Industrial
AMBIENT
TEMPERATURE
0 O C to +70 O C
-40 O C to +85 O C
Vcc
2.4V ~ 5.5V
2.4V ~ 5.5V
„ CAPACITANCE (1) (TA = 25oC, f = 1.0 MHz)
SYMBOL
CIN
CDQ
PARAMETER
Input
Capacitance
Input/Output
Capacitance
CONDITIONS
VIN=0V
VI/O=0V
MAX.
6
8
UNIT
pF
pF
1. This parameter is guaranteed and not 100% tested.
STC62WV2568
2
Revision 1.1
Jan. 2004




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STC62WV2568 ram

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