파트넘버.co.kr LTC2295 데이터시트 PDF


LTC2295 반도체 회로 부품 판매점

10Msps Low Power 3V ADC



Linear Technology 로고
Linear Technology
LTC2295 데이터시트, 핀배열, 회로
FEATURES
www.daItanstheegert4aut.ecdomDual 14-Bit ADCs
Sample Rate: 10Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 120mW
74.4dB SNR
90dB SFDR
110dB Channel Isolation
Multiplexed or Separate Data Bus
Flexible Input: 1VP-P to 2VP-P Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)
10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit)
64-Pin (9mm × 9mm) QFN Package
U
APPLICATIO S
Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
LTC2295
Dual 14-Bit, 10Msps
Low Power 3V ADC
DESCRIPTIO
The LTC®2295 is a 14-bit 10Msps, low power dual 3V
A/D converter designed for digitizing high frequency, wide
dynamic range signals. The LTC2295 is perfect for
demanding imaging and communications applications
with AC performance that includes 74.4dB SNR and 90dB
SFDR for signals well beyond the Nyquist frequency.
DC specs include ±1.2LSB INL (typ), ±0.5LSB DNL (typ)
and no missing codes over temperature. The transition
noise is a low 1LSBRMS.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share a digital output bus.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
ANALOG
INPUT A
+
INPUT
S/H
14-BIT
PIPELINED
ADC CORE
CLK A
CLK B
CLOCK/DUTY CYCLE
CONTROL
CLOCK/DUTY CYCLE
CONTROL
ANALOG
INPUT B
+
INPUT
S/H
14-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
OVDD
D13A
•••
D0A
OGND
MUX
OUTPUT
DRIVERS
OVDD
D13B
•••
D0B
OGND
2295 TA01
Typical INL, 2V Range
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0
4096
8192
CODE
12288 16384
2295 G02
2295fa
1


LTC2295 데이터시트, 핀배열, 회로
LTC2295
ABSOLUTE AXI U RATI GS
OVDD = VDD (Notes 1, 2)
Supply Voltage (VDD) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
wwwA.dnaatalsohgeeItn4pu.ucot mVoltage (Note 3) ..... –0.3V to (VDD + 0.3V)
Digital Input Voltage .................... –0.3V to (VDD + 0.3V)
Digital Output Voltage ................ –0.3V to (OVDD + 0.3V)
Power Dissipation ............................................ 1500mW
Operating Temperature Range
LTC2295C ............................................... 0°C to 70°C
LTC2295I .............................................–40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
UW U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
AINA+ 1
AINA– 2
REFHA 3
48 DA7
47 DA6
46 DA5
REFHA 4
45 DA4
REFLA 5
44 DA3
REFLA 6
43 DA2
VDD 7
42 DA1
CLKA 8
CLKB 9
65
41 DA0
40 OFB
VDD 10
REFLB 11
39 DB13
38 DB12
REFLB 12
37 DB11
REFHB 13
36 DB10
REFHB 14
AINB– 15
AINB+ 16
35 DB9
34 DB8
33 DB7
UP PACKAGE
64-LEAD (9mm × 9mm) PLASTIC QFN
TJMAX = 125°C, θJA = 20°C/W
EXPOSED PAD (PIN 65) IS GND AND MUST BE SOLDERED TO PCB
ORDER PART
NUMBER
QFN PART*
MARKING
LTC2295CUP
LTC2295IUP
LTC2295UP
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
CO VERTER CHARACTERISTICS The denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 4)
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Gain Matching
Offset Matching
Transition Noise
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
External Reference
Internal Reference
External Reference
External Reference
SENSE = 1V
14
Bits
–5 ±1.2 5
LSB
–1 ±0.5 1
LSB
–12 ±2 12
mV
–2.5 ±0.5 2.5
%FS
±10 µV/°C
±30 ppm/°C
±5 ppm/°C
±0.3 %FS
±2 mV
1 LSBRMS
2295fa
2




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