CY62137V 판매점 - 2-Mbit (128K x 16) Static RAM

CY62137V 반도체 회로 부품 판매점

2-Mbit (128K x 16) Static RAM

Cypress Semiconductor

CY62137V MoBL

2-Mbit (128K x 16) Static RAM

Features

• Temperature Ranges

— Commercial: 0°C to 70°C

— Industrial: –40°C to 85°C

— Automotive: –40°C to 125°C

• High Speed: 55 ns and 70 ns

• Wide voltage range: 2.7V–3.6V

• Ultra-low active, standby power

• Easy memory expansion with CE and OE features

• TTL-compatible inputs and outputs

• Automatic power-down when deselected

• CMOS for optimum speed/power

• Package Available in a standard 44-pin TSOP Type II

(forward pinout) package

Functional Description[1]

The CY62137V is a high-performance CMOS static RAM

organized as 128K words by 16 bits. This device features

advanced circuit design to provide ultra-low active current.

This is ideal for providing More Battery Life® (MoBL®) in

portable applications such as cellular telephones. The device

also has an automatic power-down feature that reduces power

consumption by 99% when addresses are not toggling. The

device can also be put into standby mode when deselected

(CE HIGH) or when CE is LOW and both BLE and BHE are

HIGH. The input/output pins (I/O0 through I/O15) are placed in

a high-impedance state when: deselected (CE HIGH), outputs

are disabled (OE HIGH), BHE and BLE are disabled (BHE,

BLE HIGH), or during a write operation (CE LOW, and WE

LOW).

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is

written into the location specified on the address pins (A0

through A16). If Byte High Enable (BHE) is LOW, then data

from I/O pins (I/O8 through I/O15) is written into the location

specified on the address pins (A0 through A16).

Reading from the device is accomplished by taking Chip

Enable (CE) and Output Enable (OE) LOW while forcing the

Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,

then data from the memory location specified by the address

pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is

LOW, then data from memory will appear on I/O8 to I/O15. See

the truth table at the back of this data sheet for a complete

description of read and write modes.

Logic Block Diagram

A1010

AA01

DATA IN DRIVERS

128K x 16

RAM Array

2048 x 1024

I/O0 – I/O7

I/O8 – I/O15

COLUMN DECODER

Power-down

Circuit

BHE

BLE

BHE

BLE

Note:

1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600

Document #: 38-05051 Rev. *B

Revised June 21, 2004

CY62137V MoBL

Product Portfolio

Product

CY62137VLL Industrial

CY62137VSL

CY62137VLL

CY62137VSL

CY62137VLL Automotive

Pin Configurations

Min.

2.7

VCC Range (V)

Typ.[3]

3.0

Max.

3.6

Speed

(ns)

Power Dissipation

Operating,

(mA)

ICC

Typ.[3] Max.

Standby,

(µA)

ISB2

Typ.[3] Max.

7 20 1 15

7 20 1 5

7 15 1 15

7 15 1 5

7 15 1 20

TSOP II (Forward)

Top View

I/O0

I/O1

I/O2

I/O3

VCC

VSS

I/O4

I/O5

I/O6

I/O7

A16

AA1154

A13

A12

44 A5

43 A6

42 A7

41 OE

40 BHE

39 BLE

38 I/O15

37 I/O14

36 I/O13

VI/OSS12

VCC

I/O11

31 I/O10

II//OO98

28 NC

27 A8

AAA91101

23 NC

Pin Definitions

Pin Number

Type

Description

1-5, 18-22, 24-27, 42-45 Input

7-10, 13-16, 29-32, 35-38 Input/Output

23 No Connect

A0-A16. Address Inputs

I/O0-I/O15. Data lines. Used as input or output lines depending on operation

NC. This pin is not connected to the die

17 Input/Control WE. When selected LOW, a WRITE is conducted. When selected HIGH, a READ

is conducted

6 Input/Control CE. When LOW, selects the chip. When HIGH, deselects the chip

39, 40

Input/Control

BHE, BLE. BHE = LOW selects higher order byte WRITEs or READs on the

SRAM.BLE = LOW selects lower order byte WRITEs or READs on the SRAM

41 Input/Control OE. Output Enable. Controls the direction of the I/O pins. When LOW, the I/O pins

behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as

input data pins

12, 34

Ground

Vss. Ground for the device

11, 33

Power Supply Vcc. Power supply for the device

Notes:

2. NC pins are not connected on the die.

3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(TYP)., TA = 25°C.

Document #: 38-05051 Rev. *B

Page 2 of 11

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제조업체: Cypress Semiconductor

( cypress )

CY62137V data

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CY62137V 반도체 회로 부품 판매점

2-Mbit (128K x 16) Static RAM

국내 전력반도체 판매점

일반적인 전자부품 판매점

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