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CY62137FV18 반도체 회로 부품 판매점

2-Mbit (128K x 16) Static RAM



Cypress Semiconductor 로고
Cypress Semiconductor
CY62137FV18 데이터시트, 핀배열, 회로
CY62137FV18 MoBL®
2-Mbit (128K x 16) Static RAM
Features
Very high speed: 55 ns
Wide voltage range: 1.65 V – 2.25 V
Pin compatible with CY62137CV18
Ultra low standby power
Typical standby current: 1 A
Maximum standby current: 5 A
Ultra low active power
Typical active current: 1.6 mA @ f = 1 MHz
Ultra low standby power
Easy memory expansion with CE and OE features
Automatic power down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Byte power-down feature
Available in a Pb-free 48-Ball Very fine ball grid package
(VFBGA) package
Functional Description
The CY62137FV18 is a high performance CMOS static RAM
organized as 128K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device into standby mode reduces power consumption by more
than 99% when deselected (CE HIGH or both BLE and BHE are
HIGH). The input and output pins (I/O0 through I/O15) are placed
in a high impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), both the Byte High
Enable and the Byte Low Enable are disabled (BHE, BLE HIGH),
or during an active write operation (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O0 through I/O7) is written into the location
specified on the address pins (A0 through A16). If Byte High
Enable (BHE) is LOW, then data from I/O pins (I/O8 through
I/O15) is written into the location specified on the address pins
(A0 through A16).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on I/O0 to I/O7. If
Byte High Enable (BHE) is LOW, then data from the memory
appears on I/O8 to I/O15. See the “Truth Table” on page 11 for a
complete description of read and write modes.
For best practice recommendations, refer to the Cypress
application note AN1064, SRAM System Guidelines.
Logic Block Diagram
A10
A9
A8
A7
AA65
A4
A3
A2
A1
A0
DATA IN DRIVERS
128K x 16
RAM Array
COLUMN DECODER
POWER DOWN
CIRCUIT
CE
BHE
BLE
I/O0–I/O7
I/O8–I/O15
BHE
WE
CE
OE
BLE
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-08030 Rev. *H
• San Jose, CA 95134-1709 • 408-943-2600
Revised October 15, 2010
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CY62137FV18 데이터시트, 핀배열, 회로
CY62137FV18 MoBL®
Contents
Product Portfolio .............................................................. 3
Pin Configuration ............................................................. 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Capacitance ...................................................................... 4
Thermal Resistance .......................................................... 5
AC Test Loads and Waveforms ....................................... 5
Data Retention Characteristics ....................................... 6
Data Retention Waveform ................................................ 6
Switching Characteristics ................................................ 7
Switching Waveforms ...................................................... 8
Truth Table ...................................................................... 11
Ordering Information ...................................................... 12
Ordering Code Definition ........................................... 12
Package Diagram ............................................................ 13
Acronyms ........................................................................ 14
Document Conventions ................................................. 14
Units of Measure ....................................................... 14
Document History Page ................................................. 15
Sales, Solutions, and Legal Information ...................... 16
Worldwide Sales and Design Support ....................... 16
Products .................................................................... 16
PSoC Solutions ......................................................... 16
Document #: 001-08030 Rev. *H
Page 2 of 16
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CY62137FV18

2-Mbit (128K x 16) Static RAM - Cypress Semiconductor