NDB6030PL 반도체 회로 부품 판매점
P-Channel Logic Level Enhancement Mode Field Effect Transistor
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 Fairchild |
June 1997
NDP6030PL / NDB6030PL
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These P-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage
applications such as DC/DC converters and high efficiency
switching circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
Features
-30
A,
-30
V.
RDS(ON)
RDS(ON)
=
=
0.042
0.025
Ω
Ω
@
@
VGS= -4.5 V
VGS= -10 V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
High density cell design for extremely low RDS(ON).
175°C maximum junction temperature rating.
________________________________________________________________________________
S
G
D
Absolute Maximum Ratings
Symbol Parameter
TC = 25°C unless otherwise noted
NDP6030PL
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage - Continuous
ID Drain Current - Continuous
- Pulsed
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG
TL
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJC Thermal Resistance, Junction-to-Case
RθJA Thermal Resistance, Junction-to-Ambient
© 1997 Fairchild Semiconductor Corporation
-30
±16
-30
-90
75
0.5
-65 to 175
275
NDB6030PL
-65 to 175
2
62.5
Units
V
V
A
W
°C
°C
°C
°C/W
°C/W
NDP6030PL Rev.B1
Electrical Characteristics (TC = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
OFF CHARACTERISTICS
BVDSS
∆BVDSS/∆TJ
IDSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
IGSSF Gate - Body Leakage, Forward
IGSSR Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note)
VGS = 0 V, ID = -250 µA
ID = -250 µA, Referenced to 25 o C
VDS = -24 V, VGS = 0 V
VGS = 16 V, VDS = 0 V
TJ = 125°C
VGS = -16 V, VDS = 0 V
∆VGS(th)/∆TJ
VGS(th)
Gate Threshold Voltage Temp.Coefficient
Gate Threshold Voltage
RDS(ON)
Static Drain-Source On-Resistance
ID(on) On-State Drain Current
gFS Forward Transconductance
DYNAMIC CHARACTERISTICS
ID = -250 µA, Referenced to 25 o C
VDS = VGS, ID= -250 µA
VGS = -4.5 V, ID = -15 A
TJ = 125°C
TJ = 125°C
VGS = -10 V, ID = -19 A
VGS = -4.5 V, VDS = -5 V
VDS = -4.5 V, ID = -19 A
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note)
VDS = -15 V, VGS = 0 V,
f = 1.0 MHz
tD(on) Turn - On Delay Time
tr Turn - On Rise Time
tD(off) Turn - Off Delay Time
tf Turn - Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
DRAIN-SOURCE DIODE CHARACTERISTICS
VDD = -15 V, ID = -5 A,
VGS = -5 V, RGEN = 6 Ω
VDS= -12 V
ID = -30 A , VGS = -5 V
IS Maximum Continuos Drain-Source Diode Forward Current
ISM Maximum Pulsed Drain-Source Diode Forward Current
VSD Drain-Source Diode Forward Voltage
VGS = 0 V, IS = -15 A (Note)
trr Reverse Recovery Time
Irr Reverse Recovery Current
VGS = 0 V, IF = -30 A
dIF/dt = 100 A/µs
Note:
Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%.
Min Typ Max Unit
-30
-36
V
mV/oC
-250 µA
1 mA
-100 nA
-100 nA
2.2 mV/oC
-1 -1.4 -2
V
-0.8 -1.08 -1.6
0.037 0.042
0.053 0.075
Ω
0.021 0.025
-20 A
20 S
1570
975
360
pF
pF
pF
12.5 25
60 120
50 100
52 100
26 36
6.5
11.5
nS
nS
nS
nS
nC
nC
nC
-0.92
58
-1.5
-30
-100
-1.3
A
A
V
ns
A
NDP6030PL Rev.B1
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( fairchild )
NDB6030PL transistor
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국내 전력반도체 판매점
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