NDB5060L 반도체 회로 부품 판매점
N-Channel Logic Level Enhancement Mode Field Effect Transistor
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 Fairchild |
October 1996
NDP5060L / NDB5060L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These logic level N-Channel enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process has been especially tailored
to minimize on-state resistance, provide superior
switching performance, and withstand high energy
pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage
applications such as automotive, DC/DC converters,
PWM motor controls, and other battery powered
circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
Features
26
A,
60
V.
RRDDSS(O(ONN) )==00.0.053Ω5 Ω@@VGVSG=S=5
V
10
V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low RDS(ON).
TO-220 and TO-263 (D2PAK) package for both through hole
and surface mount applications.
________________________________________________________________________________
D
G
Absolute Maximum Ratings
Symbol Parameter
TC = 25°C unless otherwise noted
NDP5060L
VDSS Drain-Source Voltage
VDGR
Drain-Gate Voltage (RGS < 1 MΩ)
VGSS Gate-Source Voltage - Continuous
- Nonrepetitive (tP < 50 µs)
ID Drain Current - Continuous
- Pulsed
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG Operating and Storage Temperature Range
S
60
60
±16
±25
26
78
68
0.45
-65 to 175
NDB5060L
Units
V
V
V
A
W
W/°C
°C
© 1997 Fairchild Semiconductor Corporation
NDP5060L Rev.A
Electrical Characteristics (TC = 25°C unless otherwise noted)
Symbol Parameter
Conditions
DRAIN-SOURCE AVALANCHE RATINGS (Note 1)
W DSS
Single Pulse Drain-Source Avalanche
Energy
VDD = 30 V, ID = 26 A
IAR Maximum Drain-Source Avalanche Current
OFF CHARACTERISTICS
BVDSS
IDSS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
VGS = 0 V, ID = 250 µA
VDS = 60 V, VGS = 0 V
IGSSF Gate - Body Leakage, Forward
IGSSR Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 1)
VGS(th)
Gate Threshold Voltage
VGS = 16 V, VDS = 0 V
VGS = -16 V, VDS = 0 V
VDS = VGS, ID = 250 µA
RDS(ON) Static Drain-Source On-Resistance
VGS = 5 V, ID = 13 A
ID(on) On-State Drain Current
gFS Forward Transconductance
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 1)
tD(on) Turn - On Delay Time
tr Turn - On Rise Time
tD(off) Turn - Off Delay Time
tf Turn - Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VGS = 10 V, ID = 13 A
VGS = 5 V, VDS = 10 V
VDS = 10 V, ID = 13 A
VDS = 30 V, VGS = 0 V,
f = 1.0 MHz
VDD = 30 V, ID = 26 A,
VGS = 5 V, RGEN = 30 Ω
RGS = 30 Ω
VDS = 24 V,
ID = 26 A, VGS = 5 V
Min Typ Max Units
100 mJ
26 A
60
TJ = 125°C
V
250 µA
1 mA
100 nA
-100 nA
TJ = 125°C
TJ = 125°C
1 1.4
2
0.65 1
1.5
0.042 0.05
0.07 0.08
0.031 0.035
26
16
V
Ω
A
S
840 pF
230 pF
75 pF
13 20
200 400
45 80
102 200
17 24
4
10
nS
nS
nS
nS
nC
nC
nC
NDP5060L Rev.A
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NDB5060L transistor
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국내 전력반도체 판매점
상호 : 아이지 인터내셔날
전화번호 : 051-319-2877
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관련 데이터시트
NDB5060
N-Channel Enhancement Mode Field Effect Transistor - Fairchild
NDB5060L
N-Channel Logic Level Enhancement Mode Field Effect Transistor - Fairchild