UPA1804 반도체 회로 부품 판매점
N-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING
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 NEC |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1804
N-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
This product is a switching device which can be driven
directly by a 4.5 V power source.
The µPA1804 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.
FEATURES
• Can be driven by a 4.5 V power source
• Low on-state resistance
RDS(on)1 = 23 mΩ MAX. (VGS = 10 V, ID = 4.0 A)
RDS(on)2 = 32 mΩ MAX. (VGS = 4.5 V, ID = 4.0 A)
• Built-in G-S protection diode against ESD
PACKAGE DRAWING (Unit : mm)
85
1, 5, 8 : Drain
2, 3, 6, 7: Source
4 : Gate
1.2 MAX.
1.0±0.05
0.25
14
3°
+5°
–3°
0.1±0.05
0.5
0.6
+0.15
–0.1
3.15 ±0.15
3.0 ±0.1
6.4 ±0.2
4.4 ±0.1
1.0 ±0.2
ORDERING INFORMATION
PART NUMBER
PACKAGE
µPA1804GR-9JG
Power TSSOP8
0.65 0.8 MAX.
0.27
+0.03
–0.08
0.10 M
0.1
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage
VDSS
30
Gate to Source Voltage
VGSS
±20
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
ID(DC)
ID(pulse)
PT
±8.0
±32
2.0
Channel Temperature
Tch 150
Storage Temperature
Tstg –55 to +150
V
V
A
A
W
°C
°C
EQUIVALENT CIRCUIT
Drain
Gate
Body
Diode
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 %
2. Mounted on ceramic substrate of 5000 mm2 x 1.1 mm
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D13868EJ1V0DS00 (1st edition)
Date Published June 1999 NS CP(K)
Printed in Japan
©
1998,1999
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS VDS = 30 V, VGS = 0 V
Gate Leakage Current
IGSS VGS = ±16 V, VDS = 0 V
Gate to Source Cut-off Voltage
VGS(off) VDS = 10 V, ID = 1 mA
Forward Transfer Admittance
| yfs | VDS = 10 V, ID = 4.0 A
Drain to Source On-state Resistance
RDS(on)1 VGS = 10 V, ID = 4.0 A
RDS(on)2 VGS = 4.5 V, ID = 4.0 A
Input Capacitance
Ciss VDS = 10 V
Output Capacitance
Coss
VGS = 0 V
Reverse Transfer Capacitance
Crss f = 1 MHz
Turn-on Delay Time
td(on)
VDD = 15 V
Rise Time
tr ID = 4.0 A
Turn-off Delay Time
td(off)
VGS(on) = 10 V
Fall Time
tf RG = 10 Ω
Total Gate Charge
QG VDS = 24 V
Gate to Source Charge
QGS ID = 8.0 A
Gate to Drain Charge
QGD
VGS = 10 V
Diode Forward Voltage
VF(S-D) IF = 8.0 A, VGS = 0 V
Reverse Recovery Time
trr IF = 8.0 A, VGS = 0 V
Reverse Recovery Charge
Qrr di/dt = 100 A / µs
µ PA1804
MIN. TYP. MAX. UNIT
10 µA
±10 µA
1.0 2.1 2.5 V
3 8.7
S
18 23 mΩ
24 32 mΩ
761 pF
258 pF
99 pF
24 ns
83 ns
46 ns
29 ns
13.5 nC
2.4 nC
3.7 nC
0.86 V
27 ns
16 nC
TEST CIRCUIT 1 SWITCHING TIME
D.U.T.
RG
PG. RG = 10 Ω
VGS
0
τ
τ = 1µ s
Duty Cycle ≤ 1 %
RL
VDD
VGS
VGS
Wave Form
10 %
0
VGS(on)
ID 90 %
ID
Wave Form
0 10 %
td(on)
ID
tr td(off)
90 %
90 %
10 %
tf
ton toff
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
2 Data Sheet D13868EJ1V0DS00
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UPA1804 transistor
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