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2SJ559 반도체 회로 부품 판매점

P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR HIGH SPEED SWITCHING



NEC 로고
NEC
2SJ559 데이터시트, 핀배열, 회로
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SJ559
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR HIGH SPEED SWITCHING
DESCRIPTION
The 2SJ559 is a switching device which can be driven directly
by a 2.5 V power source.
The 2SJ559 has excellent switching characteristics, and is
suitable for use as a high-speed switching device in digital
circuits.
PACKAGE DRAWING (Unit : mm)
0.3 ± 0.05
0.1+–00..015
D
0 to 0.1
FEATURES
Can be driven by a 2.5 V power source.
Low gate cut-off voltage.
G
0.2
+0.1
–0
S
0.5 0.5
1.0
1.6 ± 0.1
0.6
0.75 ± 0.05
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage
VDSS
Gate to Source Voltage
VGSS
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
ID(DC)
ID(pulse)
PT
Channel Temperature
Tch
Storage Temperature
Tstg
–30
# 20
# 0.1
# 0.4
200
150
–55 to +150
V
V
A
A
mW
°C
°C
Notes 1. PW 10 µs, Duty Cycle 1 %
2. Mounted on ceramic substrate of 3.0cm2 × 0.64 mm
EQUIVALENT CIRCUIT
Drain
Gate
Internal Diode
Gate Protect
Diode
Marking : C1
Source
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D13801EJ1V0DS00 (1st edition)
Date Published June 1999 NS CP(K)
Printed in Japan
©
1999


2SJ559 데이터시트, 핀배열, 회로
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Drain Cut-off Current
Gate Leakage Current
IDSS VDS = –30 V, VGS = 0 V
IGSS VGS = # 20 V, VDS = 0 V
Gate Cut-off Voltage
VGS(off) VDS = –3 V, ID = –10 µA
Forward Transfer Admittance
| yfs | VDS = –3 V, ID = –10 mA
Drain to Source On-state Resistance
RDS(on)1 VGS = –2.5 V, ID = –1 mA
RDS(on)2 VGS = –4 V, ID = –10 mA
RDS(on)3 VGS = –10 V, ID = –10 mA
Input Capacitance
Ciss VDS = –3 V
Output Capacitance
Coss
VGS = 0 V
Reverse Transfer Capacitance
Crss f = 1 MHz
Turn-on Delay Time
td(on)
VDD = –3 V
Rise Time
tr ID = –10 mA
Turn-off Delay Time
td(off)
VGS(on) = –4 V
Fall Time
tf RG = 10 Ω, RL = 300
TEST CIRCUIT SWITCHING TIME
D.U.T.
RG
PG. RG = 10
VGS
0
τ
τ = 1µ s
Duty Cycle 1 %
RL
VDD
VGS
VGS
Wave Form
10 %
0
VGS(on)
ID 90 %
ID
Wave Form
0 10 %
td(on)
ID
tr td(off)
90 %
90 %
10 %
tf
ton toff
2SJ559
MIN. TYP. MAX. UNIT
–1 µA
# 10 µA
–1.0 –1.4 –1.7 V
20 mS
23 60
11 23
6 13
5 pF
15 pF
1.3 pF
140 ns
330 ns
220 ns
320 ns
2 Data Sheet D13801EJ1V0DS00




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2SJ559 transistor

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