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NXP Semiconductors |
Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
BUK9510-30
GENERAL DESCRIPTION
N-channel enhancement mode logic
level field-effect power transistor in a
plastic envelope using ’trench’
technology. The device features very
low on-state resistance and has
integral zener diodes giving ESD
protection up to 2kV. It is intended for
use in automotive and general
purpose switching applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
Tj
RDS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
VGS = 5 V
MAX.
30
75
142
175
10.5
PINNING - TO220AB
PIN DESCRIPTION
1 gate
2 drain
3 source
tab drain
PIN CONFIGURATION
tab
1 23
SYMBOL
d
g
s
UNIT
V
A
W
˚C
mΩ
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDS
VDGR
±VGS
ID
ID
IDM
Ptot
Tstg, Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
-
RGS = 20 kΩ
-
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
-
THERMAL RESISTANCES
SYMBOL
Rth j-mb
Rth j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
-
in free air
ESD LIMITING VALUE
SYMBOL
VC
PARAMETER
Electrostatic discharge capacitor
voltage
CONDITIONS
Human body model
(100 pF, 1.5 kΩ)
MIN.
-
-
-
-
-
-
-
- 55
MAX.
30
30
10
75
53
240
142
175
UNIT
V
V
V
A
A
A
W
˚C
TYP.
-
60
MAX.
1.05
-
UNIT
K/W
K/W
MIN.
-
MAX.
2
UNIT
kV
December 1997
1
Rev 1.100
Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
BUK9510-30
STATIC CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
V(BR)DSS
VGS(TO)
IDSS
IGSS
±V(BR)GSS
RDS(ON)
Drain-source breakdown
voltage
Gate threshold voltage
Zero gate voltage drain current
Gate source leakage current
Gate-source breakdown
voltage
Drain-source on-state
resistance
VGS = 0 V; ID = 0.25 mA;
Tj = -55˚C
VDS = VGS; ID = 1 mA
Tj = 175˚C
Tj = -55˚C
VDS = 30 V; VGS = 0 V;
Tj = 175˚C
VGS = ±5 V; VDS = 0 V
Tj = 175˚C
IG = ±1 mA;
VGS = 5 V; ID = 25 A
Tj = 175˚C
MIN.
30
27
1.0
0.5
-
-
-
-
-
10
TYP.
-
-
1.5
-
-
0.05
-
0.02
-
-
MAX.
-
-
2.0
-
2.3
10
500
1
10
-
UNIT
V
V
V
V
V
µA
uA
µA
µA
V
- 9 10.5 mΩ
- - 19.5 mΩ
DYNAMIC CHARACTERISTICS
Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER
gfs
Qg(tot)
Qgs
Qgd
Ciss
Coss
Crss
td on
tr
td off
tf
Ld
Forward transconductance
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
Input capacitance
Output capacitance
Feedback capacitance
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
Ld Internal drain inductance
Ls Internal source inductance
CONDITIONS
VDS = 25 V; ID = 25 A
ID = 75 A; VDD = 24 V; VGS = 5 V
VGS = 0 V; VDS = 25 V; f = 1 MHz
VDD = 15 V; ID = 25 A;
VGS = 5 V; RG = 5 Ω
Measured from contact screw on
tab to centre of die
Measured from drain lead 6 mm
from package to centre of die
Measured from source lead 6 mm
from package to source bond pad
MIN.
12
-
-
-
-
-
-
-
-
-
-
-
TYP.
25
58
6
24
2500
640
320
35
95
130
60
3.5
MAX.
-
-
-
-
-
-
-
50
145
180
80
-
UNIT
S
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
nH
- 4.5 - nH
- 7.5 - nH
December 1997
2
Rev 1.100
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