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Dual PNP Bias Resistor Transistors



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ON Semiconductor
NSBA143TDXV6T1G 데이터시트, 핀배열, 회로
MUN5116DW1,
NSBA143TDXV6
Dual PNP Bias Resistor
Transistors
R1 = 4.7 kW, R2 = 8 kW
PNP Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(TA = 25C, common for Q1 and Q2, unless otherwise noted)
Rating
Symbol
Max
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
Collector Current Continuous IC 100 mAdc
Input Forward Voltage
VIN(fwd)
30
Vdc
Input Reverse Voltage
VIN(rev)
5
Vdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
Device
Package
Shipping
MUN5116DW1T1G,
SMUN5116DW1T1G
SOT363
3,000/Tape & Reel
NSBA143TDXV6T1G
SOT563
4,000/Tape & Reel
NSBA143TDXV6T5G
SOT563
8,000/Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
http://onsemi.com
PIN CONNECTIONS
(3) (2) (1)
R1
Q1
R2 R1
(4) (5)
R2
Q2
(6)
MARKING DIAGRAMS
SOT363
CASE 419B
6
0F M G
G
1
SOT563
CASE 463A
0F M G
G
1
0F = Specific Device Code
M = Date Code*
G = Pb-Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
Semiconductor Components Industries, LLC, 2012
September, 2012 Rev. 0
1
Publication Order Number:
DTA143TD/D


NSBA143TDXV6T1G 데이터시트, 핀배열, 회로
MUN5116DW1, NSBA143TDXV6
THERMAL CHARACTERISTICS
Characteristic
Symbol
MUN5116DW1 (SOT363) ONE JUNCTION HEATED
Total Device Dissipation
TA = 25C
Derate above 25C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
PD
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
RqJA
MUN5116DW1 (SOT363) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
TA = 25C
Derate above 25C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
PD
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
RqJA
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
RqJL
Junction and Storage Temperature Range
NSBA143TDXV6 (SOT563) ONE JUNCTION HEATED
TJ, Tstg
Total Device Dissipation
TA = 25C
Derate above 25C
(Note 1)
(Note 1)
PD
Thermal Resistance,
Junction to Ambient
(Note 1)
RqJA
NSBA143TDXV6 (SOT563) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
TA = 25C
Derate above 25C
(Note 1)
(Note 1)
PD
Thermal Resistance,
Junction to Ambient
(Note 1)
RqJA
Junction and Storage Temperature Range
TJ, Tstg
1. FR4 @ Minimum Pad.
2. FR4 @ 1.0 1.0 Inch Pad.
3. Both junction heated values assume total power is sum of two equally powered channels.
Max
187
256
1.5
2.0
670
490
250
385
2.0
3.0
493
325
188
208
55 to +150
357
2.9
350
500
4.0
250
55 to +150
Unit
mW
mW/C
C/W
mW
mW/C
C/W
C/W
C
mW
mW/C
C/W
mW
mW/C
C/W
C
http://onsemi.com
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Dual PNP Bias Resistor Transistors - ON Semiconductor