HD74LV2G245A 반도체 회로 부품 판매점
Dual Bus Transceivers
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 Renesas Technology |
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HD74LV2G245A
Dual Bus Transceivers with 3–state Outputs
REJ03D0104–0400Z
(Previous ADE-205-354C (Z))
Rev.4.00
Oct.01.2003
Description
The HD74LV2G245A has two buffers with three state output in an 8 pin package. When DIR is high, data
is transferred from the A inputs to the B outputs, and when DIR is low, data is transferred from the B inputs
to the A outputs. The A and B buses are separated by making the enable input (OE) high level. Low
voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers),
and the low power consumption extends the battery life.
Features
• The basic gate function is lined up as Renesas uni logic series.
• Supplied on emboss taping for high-speed automatic mounting.
• Electrical characteristics equivalent to the HD74LV245A
Supply voltage range : 1.65 to 5.5 V
Operating temperature range : –40 to +85°C
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V, Output : Z)
• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
• All the logical input has hysteresis voltage for the slow transition.
• Ordering Information
Part Name
Package Type
Package Code Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LV2G245AUSE SSOP-8 pin
TTP-8DBV
US
E (3,000 pcs/reel)
Rev.4.00, Oct.01.2003, page 1 of 10
www.DataSheet4U.com
HD74LV2G245A
Outline and Article Indication
• HD74LV2G245A
Index band
Lot No.
SSOP-8
Function Table
Inputs
OE
L
L
H
H : High level
L : Low level
X : Immaterial
DIR
L
H
X
YMW
L45
Y : Year code
(the last digit of year)
M : Month code
W : Week code
Marking
Operation
B data to A bus
A data to B bus
Isolation
Rev.4.00, Oct.01.2003, page 2 of 10
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제조업체: Renesas Technology
( renesas )
HD74LV2G245A transceiver
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