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Sharp Electrionic Components |
LZ2315A/LZ2316AR
LZ2315A/
LZ2316AR
Dual-power-supply (5 V/12 V) Operation
1/3-type CCD Area Sensors with 270 k Pixels
DESCRIPTION
The LZ2315A/LZ2316AR are 1/3-type (6.0 mm)
solid-state image sensors that consist of PN photo-
diodes and CCDs (charge-coupled devices) driven
by dual-power-supply. With approximately 270 000
pixels (542 horizontal x 492 vertical), the sensor
provides a stable high-resolution color (LZ2315A)/
B/W (LZ2316AR) normal or mirror image.
FEATURES
• Number of effective pixels : 512 (H) x 492 (V)
• Number of optical black pixels
– Horizontal : 2 front and 28 rear
• Pixel pitch : 9.6 µm (H) x 7.5 µm (V)
• Mg, G, Cy, and Ye complementary color filters
(For LZ2315A)
• Low fixed-pattern noise and lag
• No burn-in and no image distortion
• Blooming suppression structure
• Built-in output amplifier
• Built-in pulse mix circuit
• Built-in overflow drain voltage circuit and reset
gate voltage circuit
• Variable electronic shutter (1/60 to 1/10 000 s)
• Normal or mirror image output available from
common output pin
• Compatible with NTSC standard (LZ2315A)/
EIA standard (LZ2316AR)
• Package :
16-pin shrink-pitch WDIP [Ceramic]
(WDIP016-N-0500C)
Row space : 12.70 mm
PIN CONNECTIONS
16-PIN SHRINK-PITCH WDIP
TOP VIEW
ØRS 1
RD 2
GND 3
OS 4
OD 5
ØH2B 6
ØH2 7
ØH1B 8
16 T1
15 OFD
14 ØTG
13 ØV2
12 ØV1
11 ØV4
10 ØV3
9 ØH1
(WDIP016-N-0500C)
PRECAUTIONS
• The exit pupil position of lens should be more
than 25 mm (LZ2315A)/20 mm (LZ2316AR) from
the top surface of the CCD.
• Refer to "PRECAUTIONS FOR CCD AREA
SENSORS" for details.
COMPARISON TABLE
TV standard
Characteristics
LZ2315A
LZ2316AR
NTSC standard (Color)
EIA standard (B/W)
Refer to each following specification.
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
1
LZ2315A/LZ2316AR
PIN DESCRIPTION
SYMBOL
PIN NAME
NOTE
RD Reset transistor drain
OD Output transistor drain
OS Output signals
ØRS Reset transistor clock
1
ØV1, ØV2, ØV3, ØV4
ØH1, ØH2, ØH1B, ØH2B
Vertical shift register clock
Horizontal shift register clock
2
ØTG
OFD
Transfer gate clock
Overflow drain
3
1
GND
Ground
T1 Test pin
NOTES :
1. ØRS, OFD : Use the circuit parameter indicated in "SYSTEM CONFIGURATION
EXAMPLE", and do not connect to DC voltage directly. When not using electronic shutter,
connect OFD to GND through a 0.1 µF capacitor and a 1 M$ resistor.
2. ØV1-ØV4 : Input the clock through a 0.1 µF capacitor.
3. ØTG : Use the circuit parameter indicated in "SYSTEM CONFIGURATION EXAMPLE".
ABSOLUTE MAXIMUM RATINGS
(TA = +25 ˚C)
PARAMETER
SYMBOL
RATING
UNIT NOTE
Output transistor drain voltage
VOD
0 to +15
V
Reset transistor drain voltage
VRD
0 to +15
V
Overflow drain voltage
VOFD
Internal output
V1
Test pin, T1
VT1
0 to +15
V
Reset gate clock voltage
VØRS
Internal output
V2
Vertical shift register clock voltage
VØV
0 to +7.5
V
Horizontal shift register clock voltage
VØH
–0.3 to +7.5
V
Transfer gate clock voltage
VØTG
–0.3 to +15
V
Storage temperature
TSTG
–40 to +85
˚C
Ambient operating temperature
TOPR
–20 to +70
˚C
NOTES :
1. Do not connect to DC voltage directly. When OFD is connected to GND, connect VOD to GND. Overflow drain clock is
applied below 13 Vp-p.
2. Do not connect to DC voltage directly. When ØRS is connected to GND, connect VOD to GND. Reset gate clock is
applied below 8 Vp-p.
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