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HYS72V64300GR-75-D 반도체 회로 부품 판매점

PC133 Registered SDRAM-Modules



Infineon 로고
Infineon
HYS72V64300GR-75-D 데이터시트, 핀배열, 회로
HYS 72Vxx3xxGR
PC133 Registered SDRAM-Modules
3.3 V 168-pin Registered SDRAM Modules
PC133 128 MByte Module
PC133 256 MByte module
PC133 512 MByte Module
PC133 1 GByte Module
PC133 2 GByte Module
• 168-pin Registered 8 Byte Dual-In-Line
SDRAM Module for PC and Server main
memory applications
• Programmable CAS Latency, Burst Length,
and Wrap Sequence (Sequential &
Interleave)
• One bank 16M × 72, 32M x 72, 64M × 72and
128M x 72, two bank 128M × 72 and
256M x 72 organization
• Optimized for ECC applications with very low
input capacitances
• JEDEC standard Synchronous DRAMs
(SDRAM) Programmable CAS Latency, Burst
Length and Wrap Sequence (Sequential &
Interleave)
• Single + 3.3 V (± 0.3 V) power supply
• Auto Refresh (CBR) and Self Refresh
• All inputs and outputs are LVTTL compatible
• Serial Presence Detect with E2PROM
• Utilizes SDRAMs in TSOPII-54 packages
with registers and PLL.
• Card Size: 133.35 mm × 38.10 / 43.18 mm
with Gold contact pads and max. 4.00 / 6.80
mm thickness (JEDEC MO-161)
• These modules all fully compatible with the
current industry standard PC133 and PC100
specifications
• Performance:
speed grade
-7 -7.5 Unit
fCK Clock Frequency (max.) @ CL = 3 133 133 MHz
tCK Clock Cycle Time (min.) @ CL = 3 7.5 7.5 ns
tAC
Clock Access Time (min.) @ CL= 3
5.4
5.4
ns
fCK Clock Frequency (max.) @ CL = 2 133 100 MHz
tCK Clock Cycle Time (min.) @ CL = 2 7.5
10
ns
tAC
Clock Access Time (min.) @ CL= 2
5.4
6
ns
Description
The HYS 72Vxx3xxGR-7 and -7.5 are industry standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs)
organized as 16M × 72, 32M x 72, 64M × 72, 128M × 72 and 256M x 72 high speed memory arrays designed with
Synchronous DRAMs (SDRAMs) for ECC applications. All control and address signals are registered on-DIMM
and the design incorporates a PLL circuit for the Clock inputs. Use of an on-board register reduces capacitive
loading on the input signals but are delayed by one cycle in arriving at the SDRAM devices. Decoupling capacitors
are mounted on the PC board. The DIMMs use a serial presence detects scheme implemented via a serial
E2PROM using the 2-pin I2C protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second
128 bytes are available to the end user. All Infineon 168-pin DIMMs provide a high performance, flexible 8-byte
interface in a 133.35 mm long footprint.
INFINEON Technologies
1
2002-07-18


HYS72V64300GR-75-D 데이터시트, 핀배열, 회로
HYS 72Vxx3xxGR
PC133 Registered SDRAM-Modules
Ordering Information
Partnumber 1)
Compliance
Code 2)
Description
SDRAM
Technology
PC133-333:
HYS 72V16300GR-7.5-C
HYS 72V16300GR-7.5-E
PC133R-333-542-B2 one bank 128 MB Reg. DIMM
64 MBit (x4)
HYS 72V16301GR-7.5-C2 PC133R-333-542-B2 one bank 128 MB Reg. DIMM
128 MBit (x8)
HYS 72V32301GR-7.5-C2 PC133R-333-542-B2 one bank 256 MB Reg. DIMM
128 Mbit (x4)
HYS 72V32300GR-7.5-C2
HYS 72V32300GR-7.5-D
PC133R-333-542-AA one bank 256 MB Reg. DIMM
256 Mbit (x8)
HYS 72V64300GR-7.5-C2
HYS 72V64300GR-7.5-D
PC133R-333-542-B2 one bank 512 MB Reg. DIMM
256 MBit (x4)
HYS 72V128320/1GR-7.5-C2 PC133R-333-542-B2 two banks 1 GByte Reg. DIMM
HYS 72V128320/1GR-7.5-D
256 MBit
(x4, stacked) 3)
HYS 72V128300GR-7.5-A PC133R-333-542-B2 one bank 1 GByte Reg. DIMM
512 MBit (x4)
HYS 72V256320/1GR-7.5-A PC133R-333-542-B2 two banks 2 GByte Reg. DIMM
512 MBit
(x4, stacked) 3)
PC133-222:
HYS 72V16300GR-7-E
PC133R-222-542-B2 one bank 128 MB Reg. DIMM
64 MBit (x4)
HYS 72V16301GR-7-C2
PC133R-222-542-B2 one bank 128 MB Reg. DIMM
128 MBit (x8)
HYS 72V32301GR-7-C2
PC133R-222-542-B2 one bank 256 MB Reg. DIMM
128 Mbit (x4)
HYS 72V32300GR-7-D
PC133R-222-542-AA one bank 256 MB Reg. DIMM
256 Mbit (x8)
HYS 72V64300GR-7-D
PC133R-222-542-B2 one bank 512 MB Reg. DIMM
256 MBit (x4)
HYS 72V128320/1GR-7-D PC133R-222-542-B2 two banks 1 GByte Reg. DIMM
256 MBit
(x4, stacked) 3)
HYS 72V128300GR-7-A
PC133R-222-542-B2 one bank 1 GByte Reg. DIMM
512 MBit (x4)
HYS 72V256320/1GR-7-A PC133R-222-542-B2 two banks 2 GByte Reg. DIMM
512 MBit
(x4, stacked) 3)
Notes:
1.) All part numbers end with a place code, designating the die revision of the components used on the
Registered DIMM module. Consult factory for current revision. Example: HYS 64V32300GR-7.5-D,
indicating Rev.D dies are used for 256Mbit SDRAM components.
2.) The Compliance Code is printed on the modules labels and describes speed sort of the modules,
latencies, access time from clock,SPD revision and Raw Card version acording to the actual JEDEC
standard.
3.) Modules with stacked components are available in two version, with components stacked using a
soldering stacking technique (f.e. HYS72V128320GR-7.5 ) and an welding technique developed by
INFINEON Technologies (f.e. HYS72V128321GR-7.5)
.
INFINEON Technologies
2
2002-07-18




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PC133 Registered SDRAM-Modules - Infineon