M6MGB162S2BVP 반도체 회로 부품 판매점
CMOS 3.3V-ONLY FLASH MEMORY & CMOS SRAM Stacked-MCP
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 Mitsubishi |
MITSUBISHI LSIs
M6MGB/T162S2BVP
16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS
3.3V-ONLY FLASH MEMORY &
2,097,152-BIT (262,144-WORD BY 8-BIT) CMOS SRAM
Stacked-MCP (Multi Chip Package)
DESCRIPTION
FEATURES
The MITSUBISHI M6MGB/T162S2BVP is a Stacked Multi • Access time
Chip Package (S-MCP) that contents 16M-bits flash memory
Flash Memory
and 2M-bits Static RAM in a 48-pin TSOP (TYPE-I).
SRAM
• Supply voltage
90ns ( Max.)
85ns (Max.)
Vcc=2.7 ~ 3.6V
16M-bits Flash memory is a 1048576 words, 3.3V-only, and • Ambient temperature
high performance non-volatile memory fabricated by CMOS
W version
Ta=-20 ~ 85°C
technology for the peripheral circuit and DINOR(DIvided • Package : 48-pin TSOP (Type-I) , 0.4mm lead pitch
bit-line NOR) architecture for the memory cell.
2M-bits SRAM is a 262144bytes unsynchronous SRAM
fabricated by silicon-gate CMOS technology.
APPLICATION
M6MGB/T162S2BVP is suitable for the application of the
mobile-communication-system to reduce both the mount
Mobile communication products
space and weight .
A15
A14
A13
A12
A11
A10
A9
A8
A19
S-CE
WE#
F-RP#
F-WP#
S-VCC
F-RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
PIN CONFIGURATION (TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
F-VCC
S-VCC
GND
S-A-1
A0-A16
A17-A19
DQ0-DQ15
F-CE#
S-CE
OE#
WE#
F-WP#
F-RP#
F-RY/BY#
48 A16
47 DQ15
46 GND
45 S-A-1
44 DQ7
43 DQ14
42 DQ6
41 DQ13
40 DQ5
39 DQ12
38 DQ4
37 F-VCC
36 DQ11
35 DQ3
34 DQ10
33 DQ2
32 DQ9
31 DQ1
30 DQ8
29 DQ0
28 OE#
27 GND
26 F-CE#
25 A0
14.0 mm
:Vcc for Flash
:Vcc for SRAM
:GND for Flash/SRAM
:Address for SRAM
:Flash/SRAM common Address
:Address for Flash
:Data I/O
:Flash Chip Enable
:SRAM Chip Enable
:Flash/SRAM Output Enable
:Flash/SRAM Write Enable
:Flash Write Protect
:Flash Reset Power Down
:Flash Ready /Busy
NC:Non Connection
1 Sep.1999 , Rev.2.0
BLOCK DIAGRAM
16Mb Flash Memory
A19
A18
A17
A16
ADDRESS
INPUTS
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CHIP ENABLE INPUT F-CE#
OUTPUT ENABLE INPUT OE#
WRITE ENABLE INPUT WE#
WRITE PROTECT INPUT F-WP#
RESET/POWER DOWN INPUT F-RP#
READY/BUSY OUTPUT F-RY/BY#
2Mb SRAM
S-A-1
A0
A15
A16
S-CE
WE#
OE#
2
MITSUBISHI LSIs
M6MGB/T162S2BVP
16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS
3.3V-ONLY FLASH MEMORY &
2,097,152-BIT (262,144-WORD BY 8-BIT) CMOS SRAM
Stacked-MCP (Multi Chip Package)
X-DECODER
Y-DECODER
128 WORD PAGE BUFFER
Main Block
32KW
28
Main Block
Parameter Block7
Parameter Block6
Parameter Block5
Parameter Block4
Parameter Block3
Parameter Block2
Parameter Block1
Boot Block
32KW
16KW
16KW
16KW
16KW
16KW
16KW
16KW
16KW
Y-GATE / SENSE AMP.
STATUS / ID REGISTER
CUI WSM
MULTIPLEXER
INPUT/OUTPUT
BUFFERS
DQ15 DQ14DQ13DQ12
DQ3DQ2DQ1DQ0
DATA INPUTS/OUTPUTS
262144 WORD x
8 BITS
F-VCC (3.3V)
GND (0V)
DQ 0
DQ 7
CLOCK
GENERATOR
S-VCC
GND
Sep.1999 , Rev.2.0
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제조업체: Mitsubishi
( mitsubishi )
M6MGB162S2BVP ram
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