FDS9958_F085 반도체 회로 부품 판매점
Dual P-Channel PowerTrench MOSFET
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 Fairchild Semiconductor |
November 2008
FDS9958_F085
Dual P-Channel PowerTrench® MOSFET
-60V, -2.9A, 105mΩ
Features
General Description
Max rDS(on) =105mΩ at VGS = -10V, ID = -2.9A
Max rDS(on) =135mΩ at VGS = -4.5V, ID = -2.5A
Qualified to AEC Q101
RoHS Compliant
These P-channel logic level specified MOSFETs are produced
using Fairchild Semiconductor’s advanced PowerTrench®
process that has been especially tailored to minimize the
on-state resistance and yet maintain low gate charge for superior
switching performance.
These devices are well suited for portable electronics
applications: load switching and power management, battery
charging and protection circuits.
Applications
Load Switch
Power Management
D2
D1
D1
D2
D2 5
D2 6
Q2
4 G2
3 S2
Pin 1
G2
S2
G1
S1
SO-8
D1 7
D1 8
Q1
2 G1
1 S1
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
Single Pulse Avalanche Energy
Power Dissipation for Dual Operation
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 3)
(Note 1a)
(Note 1b)
Ratings
-60
±20
-2.9
-12
54
2
1.6
0.9
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
40
78
°C/W
Device Marking
FDS9958
Device
FDS9958_F085
Package
SO-8
Reel Size
330mm
Tape Width
12mm
Quantity
2500units
©2008 Fairchild Semiconductor Corporation
FDS9958_F085 Rev.A
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
∆BVDSS
∆TJ
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
IDSS Zero Gate Voltage Drain Current
IGSS
Gate to Source Leakage Current
ID = -250µA, VGS = 0V
ID = -250µA, referenced to 25°C
VDS = -48V,
VGS = 0V
TJ = 125°C
VGS = ±20V, VDS = 0V
-60
V
-52 mV/°C
-1
-100
±100
µA
nA
On Characteristics
VGS(th)
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = -250µA
-1.0 -1.6 -3.0
V
ID = -250µA, referenced to 25°C
4 mV/°C
VGS = -10V, ID = -2.9A
VGS = -4.5V, ID = -2.5A
VGS = -10V, ID = -2.9A, TJ= 125°C
VDD = -5V, ID = -2.9A
82 105
103 135 mΩ
131 190
7.7 S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = -30V, VGS = 0V,
f = 1MHz
765 1020
90 120
40 65
pF
pF
pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VDD = -30V, ID = -2.9A,
VGS = -10V, RGEN = 6Ω
VGS = 0V to -10V
VGS = 0V to -4.5V
VDD = -30V,
ID = -2.9A
6 12 ns
3 10 ns
27 43 ns
6 12 ns
16 23 nC
8 12 nC
2 nC
3 nC
Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage VGS = 0V, IS = -1.3A (Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = -2.9A, di/dt = 100A/µs
-0.8 -1.2
26 42
21 35
V
ns
nC
NOTES:
1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a) 78°C/W when
mounted on a 1 in2
pad of 2 oz copper
b) 135°C/W when
mounted on a
minimun pad
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3. UIL condition: Starting TJ = 25°C, L = 3mH, IAS = 6A, VDD = 60V, VGS = 10V.
©2008 Fairchild Semiconductor Corporation
FDS9958_F085 Rev.A
2
www.fairchildsemi.com
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