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Taiwan Semiconductor Company |
TO-92
Pin Definition:
1. Gate
2. Drain
3. Source
TSM1N45
450V N-Channel Pwowww.eDartaMSheOet4SU.cFomET
PRODUCT SUMMARY
VDS (V)
RDS(on)(Ω)
450 4.25 @ VGS =10V
ID (A)
0.25
General Description
The TSM1N45 is N-Channel enhancement mode power field effect transistors are produced using planar DMOS
technology process.
This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching
performance, and withstand higher energy pulse in the avalanche and commutation mode. There devices are well
suited for electronic ballasts base and half bridge configuration.
Features
● Low gate charge @ typical 6.5nC
● Low Crss @ typical 6.5pF
● Avalanche energy specified
● Improved dv/dt capability
● Gate-Source Voltage ±30V guaranteed
Block Diagram
Ordering Information
Part No.
TSM1N45CT B0
TSM1N45CT A3
Package
TO-92
TO-92
Packing
1Kpcs / Bulk
2Kpcs / Ammo
Absolute Maximum Rating (Ta = 25oC unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current (Note 1)
Single Pulse Drain to Source Avalanche Energy (Note 2)
Avalanche Current (Note 1)
Repetitive Avalanche Energy (Note 1)
Peak Diode Recovery dv/dt (Note 3)
VDS
VGS
ID
IDM
EAS
IAR
EAR
dv/dt
Total Power Dissipation @TC =25ºC
Operating Junction and Storage Temperature Range
PDTOT
TJ, TSTG
Thermal Performance
Parameter
Thermal Resistance - Junction to Lead
Thermal Resistance - Junction to Ambient
Symbol
RӨJL
RӨJA
N-Channel MOSFET
Limit
450
±30
0.5
4
108
0.5
0.25
5.5
2
-55 to +150
Limit
50
140
Unit
V
V
A
A
mJ
A
mJ
V/ns
W
oC
Unit
oC/W
oC/W
1/8 Version: A09
TSM1N45
450V N-Channel Pwowww.eDartaMSheOet4SU.cFomET
Electrical Specifications (Ta=25oC, unless otherwise noted)
Parameter
Conditions
Symbol Min Typ Max Unit
Static
Drain-Source Breakdown Voltage
Drain-Source On-State Resistance
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage
Forward Transconductance
Dynamic
VGS = 0V, ID = 250uA
VGS = 10V, ID = 0.25A
VDS = VGS, ID = 250uA
VDS = VGS, ID = 250mA
VDS = 450V, VGS = 0V
VGS = ±30V, VDS = 0V
VDS = 50V, ID = 0.25A
BVDSS
RDS(ON)
VGS(TH)
IDSS
IGSS
gfs
450
--
2.3
3.2
--
--
--
-- -- V
3.7 4.25
Ω
3.0 3.7
4.0 4.8
V
-- 10 uA
--
±100
nA
0.7 --
S
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
VDS = 360V, ID = 0.5A, Qg -- 6.5 10
VGS = 10V
Qgs -- 1.3 -- nC
(Note 4,5)
Qgd -- 3.2 --
VDS = 25V, VGS = 0V,
f = 1.0MHz
Ciss -- 235 --
Coss -- 29 -- pF
Crss -- 6.5 --
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
VGS = 25V, ID = 0.5A,
VDS = 225V, RG = 25Ω
(Note 4,5)
Drain-Source Diode Characteristics and Maximum Ratings
td(on)
tr
td(off)
tf
-- 14.7 --
-- 32.8 --
-- 25.2 --
-- 23.7 --
nS
Maximum Continuous Drain-Source Diode Forward Current
IS -- -- 0.5 A
Maximum Pulsed Drain-Source Diode Forward Current
ISM -- -- 4.0 A
Drain-Source Diode Forward Voltage VGS = 0V, IS = 0.5A
VSD -- -- 1.4 V
Reverse Recovery Time
Reverse Recovery Charge
VGS = 0V, IS = 1A
dIF/dt = 100A/µS
(Note 4)
trr -- 110 -- nS
Qrr
-- 0.35 --
µC
Notes:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L=75mH, IAS=1.6A, VDD=50V, RG=25Ω, Starting TJ=25ºC
3. ISD ≤ 0.5A, di/dt ≤ 300A/µS, VDD ≤ BVDSS, Starting TJ=25ºC
4. Pulse test: pulse width ≤ 300uS.
5. Essentially independent of operating temperature
6. a) Reference point of the is the drain RӨJL lead
b) When mounted on 3”x4.5” FR-4 PCB without any pad copper in a still air environment
(RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistance. RӨCA is determined by the
user’s board design)
2/8 Version: A09
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