FDD6782A 반도체 회로 부품 판매점
N-Channel MOSFET
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 Fairchild Semiconductor |
FDD6782A
N-Channel PowerTrench® MOSFET
January 2009
25 V, 10.5 mΩ
Features
General Description
Max rDS(on) = 10.5 mΩ at VGS = 10 V, ID = 14.9 A
Max rDS(on) = 24.0 mΩ at VGS = 4.5 V, ID = 11.0 A
100% UIL test
RoHS Compliant
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency of DC/DC converters using either
synchronous or conventional switching PWM controllers. It has
been optimized for low gate charge, low rDS(on) and fast
switching speed.
Applications
Vcore DC-DC for Desktop Computers and Servers
VRM for Intermediate Bus Architecture
G
S
D
DTO-P-2A5K2
(TO-252)
D
G
S
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted
www.DataSheet4U.com
Symbol
Parameter
VDS Drain to Source Voltage
VGS Gate to Source Voltage
Drain Current -Continuous (Package limited) TC = 25 °C
ID
-Continuous (Silicon limited)
-Continuous
TC = 25 °C
TA = 25 °C
-Pulsed
EAS
PD
TJ, TSTG
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 3)
(Note 1a)
Ratings
25
±20
20
42
20
100
12
31
3.7
-55 to +175
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
4.8
40
°C/W
Device Marking
FDD6782A
Device
FDD6782A
Package
D-PAK (TO-252)
Reel Size
13 ’’
Tape Width
12 mm
Quantity
2500 units
©2009 Fairchild Semiconductor Corporation
FDD6782A Rev.C
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 µA, VGS = 0 V
25
V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, referenced to 25 °C
16 mV/°C
IDSS Zero Gate Voltage Drain Current
VDS = 20 V, VGS = 0 V
1 µA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
On Characteristics
VGS(th)
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = 250 µA
ID = 250 µA, referenced to 25 °C
VGS = 10 V, ID = 14.9 A
VGS = 4.5 V, ID = 11.0 A
VGS = 10 V, ID = 14.9 A, TJ = 150 °C
VDS = 5 V, ID = 14.9 A
1.0
1.8 3.0
V
-6 mV/°C
8.3
17.8
12.7
60
10.5
24.0
16.1
mΩ
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
VDS = 13 V, VGS = 0 V,
f = 1MHz
f = 1MHz
800 1065
162 220
151 230
1.0
pF
pF
pF
Ω
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VDD = 13 V, ID = 14.9 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V
VGS = 0 V to 5 V VDD = 13 V,
ID = 14.9 A
7 14 ns
3 10 ns
15 27 ns
2 4 ns
15 27 nC
8 16 nC
2.5 nC
3.2 nC
www.DataShDereat4iUn.-cSomource Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, IS = 3.1 A
VGS = 0 V, IS = 14.9 A
(Note 2)
(Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = 14.9 A, di/dt = 100 A/µs
0.8 1.2
0.9 1.3
V
14 26 ns
4 10 nC
Notes:
1: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user’s board design.
a) 40 °C/W when mounted on a
1 in2 pad of 2 oz copper
b) 96 °C/W when mounted
on a minimum pad.
2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3: EAS of 12 mJ is based on starting TJ = 25 °C, L = 1 mH, IAS = 5 A, VDD = 23 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 12 A.
©2009 Fairchild Semiconductor Corporation
FDD6782A Rev.C
2
www.fairchildsemi.com
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FDD6782A mosfet
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