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Fairchild Semiconductor |
Data Sheet
January 2002
IRFD120
1.3A, 100V, 0.300 Ohm, N-Channel
Power MOSFET
This advanced power MOSFET is designed, tested, and
guaranteed to withstand a specified level of energy in the
breakdown avalanche mode of operation. These are
N-Channel enhancement mode silicon gate power field
effect transistors designed for applications such as switching
regulators, switching convertors, motor drivers, relay drivers,
and drivers for high power bipolar switching transistors
requiring high speed and low gate drive power. They can be
operated directly from integrated circuits.
Formerly developmental type TA17401.
Ordering Information
PART NUMBER
PACKAGE
BRAND
IRFD120
HEXDIP
IRFD120
NOTE: When ordering, use the entire part number.
Features
• 1.3A, 100V
• rDS(ON) = 0.300Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
HEXDIP
GATE
DRAIN
SOURCE
©2002 Fairchild Semiconductor Corporation
IRFD120 Rev. B
IRFD120
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor (See Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
IRFD120
100
100
1.3
5.2
±20
1.0
0.008
36
-55 to 150
300
260
UNITS
V
V
A
A
V
W
W/oC
mJ
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
On-State Drain Current (Note 2)
Gate Source Leakage
Drain Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge
Gate to Drain “Miller” Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Internal Drain Inductance
Internal Source Inductance
BVDSS
VGS(TH)
IDSS
ID(ON)
IGSS
rDS(ON)
gfs
td(ON)
tr
td(OFF)
tf
Qg(TOT)
Qgs
Qgd
CISS
COSS
CRSS
LD
LS
ID = 250µA, VGS = 0V (Figure 9)
VGS = VDS, ID = 250µA
VDS = Rated BVDSS, VGS = 0V
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC
VDS > ID(ON) x rDS(ON) Max, VGS = 10V
VGS = ±20V
ID = 0.6A, VGS = 10V (Figures 7, 8)
VDS > ID(ON) x rDS(ON)MAX, ID = 0.6A (Figure 11)
VDD = 0.5 x Rated BVDSS, ID ≈ 1.3A,
VGS = 10V, RG = 9.1Ω
RL = 38.5Ω for VDD = 50V
MOSFET Switching Times are Essentially
Independent of Operating Temperature
VGS = 10V, ID = 1.3A, VDS = 0.8 x Rated BVDSS,
Ig(REF) = 1.5mA (Figure 13)
Gate Charge is Essentially Independent of Operating
Temperature
VGS = 0V, VDS = 25V, f = 1MHz (Figure 10)
Measured From the Drain
Lead, 2mm (0.08in) from
Package to Center of Die
Measured From the Source
Lead, 2mm (0.08in) from
Header to Source Bonding
Pad
Modified MOSFET
Symbol Showing the
Internal Device’s
Inductances
D
LD
G
LS
Thermal Resistance Junction to Ambient RθJA Free Air Operation
S
MIN
100
2.0
-
-
1.3
-
-
0.9
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP MAX UNITS
-- V
- 4.0 V
- 25 µA
- 250 µA
-- A
- ±500 nA
0.25 0.30
Ω
1.0 -
S
20 40
ns
35 70
ns
50 100
ns
35 70
ns
11 15
nC
6.0 -
5.0 -
450 -
200 -
50 -
4.0 -
nC
nC
pF
pF
pF
nH
6.0 -
nH
- 120 oC/W
©2002 Fairchild Semiconductor Corporation
IRFD120 Rev. B
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