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Fairchild Semiconductor |
FQB7N10L / FQI7N10L
100V LOGIC N-Channel MOSFET
December 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as high
efficiency switching DC/DC converters, and DC motor
control.
Features
• 7.3A, 100V, RDS(on) = 0.35Ω @VGS = 10 V
• Low gate charge ( typical 4.6 nC)
• Low Crss ( typical 12 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
• Low level gate drive requirments allowing
direct operationfrom logic drives
D
GS
D2-PAK
FQB Series
GDS
I2-PAK
FQI Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
D
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S
FQB7N10L / FQI7N10L
100
7.3
5.15
29.2
± 20
50
7.3
4.0
6.0
3.75
40
0.27
-55 to +175
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RθJC
RθJA
RθJA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
Typ Max Units
-- 3.75 °C/W
-- 40 °C/W
-- 62.5 °C/W
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
Electrical Characteristics
Symbol
Parameter
TC = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
∆BVDSS
/ ∆TJ
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
IDSS
Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 100 V, VGS = 0 V
VDS = 80 V, TC = 150°C
VGS = 20 V, VDS = 0 V
VGS = -20 V, VDS = 0 V
100
--
--
--
--
--
--
0.1
--
--
--
--
--
--
1
10
100
-100
On Characteristics
VGS(th) Gate Threshold Voltage
RDS(on) Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 3.65 A
VGS = 5 V, ID = 3.65 A
VDS = 30 V, ID = 3.65 A
(Note 4)
1.0 --
--
0.275
0.300
-- 5.0
2.0
0.35
0.38
--
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 220 290
-- 55
72
-- 12
15
Switching Characteristics
td(on)
Turn-On Delay Time
tr Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = 50 V, ID = 7.3 A,
RG = 25 Ω
-- 9
30
-- 100 210
-- 17
45
(Note 4, 5) -- 50 110
VDS = 80 V, ID = 7.3 A,
-- 4.6 6.0
VGS = 5 V
-- 1.0
--
(Note 4, 5) --
2.6
--
V
V/°C
µA
µA
nA
nA
V
Ω
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
ISM Maximum Pulsed Drain-Source Diode Forward Current
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 7.3 A
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = 7.3 A,
dIF / dt = 100 A/µs
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 1.4mH, IAS = 7.3A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 7.3A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
--
--
--
--
--
-- 7.3
-- 29.2
-- 1.5
70 --
140 --
A
A
V
ns
nC
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
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