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FDS6961A 반도체 회로 부품 판매점

Dual N-Channel Logic Level PowerTrenchTM MOSFET



Fairchild Semiconductor 로고
Fairchild Semiconductor
FDS6961A 데이터시트, 핀배열, 회로
April 1999
FDS6961A
Dual N-Channel Logic Level PowerTrenchTM MOSFET
General Description
These N-Channel Logic Level MOSFETs are
produced using Fairchild Semiconductor's
advanced PowerTrench process that has been
especially tailored to minimize the on-state
resistance and yet maintain superior switching
performance.
These devices are well suited for low voltage
and battery powered applications where low
in-line power loss and fast switching are
required.
Features
3.5 A, 30 V. RDS(ON) = 0.090 @ VGS = 10 V
RDS(ON) = 0.140 @ VGS = 4.5 V.
Fast switching speed.
Low gate charge (2.1nC typical).
High performance trench technology for extremely low
RDS(ON).
High power and current handling capability.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
D2
D2
D1
D1
F6D9S61A
SO-8
G2
S2
pin 1
G1
S1
SO-8
5
6
7
8
SOT-223
SOIC-16
4
3
2
1
Absolute Maximum Ratings TA = 25oC unless other wise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Power Dissipation for Single Operation (Note 1)
Power Dissipation for Single Operation (Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC Thermal Resistance, Junction-to-Case (Note 1)
© 1999 Fairchild Semiconductor Corporation
Ratings
30
±20
3.5
14
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
°C
°C/W
°C/W
FDS6961A Rev.C


FDS6961A 데이터시트, 핀배열, 회로
Electrical Characteristics
Symbol
Parameter
OFF CHARACTERISTICS
( TA = 25 OC unless otherwise noted )
Conditions
Min Typ Max Units
BVDSS
BVDSS/TJ
IDSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
IGSSF Gate - Body Leakage, Forward
IGSSR Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 2)
VGS = 0 V, I D = 250 µA
ID = 250 µA, Referenced to 25 oC
VDS = 24 V, VGS = 0 V
TJ = 55°C
VGS = 20 V, VDS = 0 V
VGS = -20 V, VDS = 0 V
30
V
25 mV/oC
1 µA
10 µA
100 nA
-100 nA
VGS(th)
VGS(th)/TJ
RDS(ON)
Gate Threshold Voltage
Gate Threshold Voltage Temp. Coefficient
Static Drain-Source On-Resistance
ID(ON) On-State Drain Current
gFS Forward Transconductance
DYNAMIC CHARACTERISTICS
VDS = VGS, ID = 250 µA
ID = 250 µA, Referenced to 25 oC
1 1.8
3
V
-5 mV/oC
VGS = 10 V, I D = 3.5 A
0.076 0.09
TJ =125°C
0.11 0.155
VGS = 4.5 V, I D = 2.8 A
0.107 0.14
VGS = 10 V, VDS = 5 V
14
VDS = 15 V, I D = 3.5 A
6
A
S
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
220 pF
50 pF
20 pF
tD(on) Turn - On Delay Time
tr Turn - On Rise Time
VDS = 15 V, I D = 1 A
VGS = 10 V , RGEN = 6
tD(off) Turn - Off Delay Time
tf Turn - Off Fall Time
Qg Total Gate Charge
VDS = 15 V, I D = 3.5 A,
Qgs Gate-Source Charge
VGS = 5 V
Qgd Gate-Drain Charge
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
3 6 ns
11 22 ns
7 14 ns
3 6 ns
2.1 4 nC
0.8 nC
0.7 nC
IS
VSD
Notes:
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 1.3 A (Note 2)
1.3
0.73 1.2
A
V
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is
guaranteed by design while RθCA is determined by the user's board design.
a. 78OC/W on a 0.5 in2
pad of 2oz copper.
b. 125OC/W on a 0.02 in2
pad of 2oz copper.
c. 135OC/W on a minimum
mounting pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDS6961A Rev.C




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FDS6961A mosfet

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Dual N-Channel Logic Level PowerTrenchTM MOSFET - Fairchild Semiconductor