2SK2341 반도체 회로 부품 판매점
SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE
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 NEC |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK2341
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The 2SK2341 is N-channel Power MOS Field Effect Transis-
tor designed for high voltage switching applications.
FEATURES
• Low On-state Resistance
RDS(on) = 0.26 Ω MAX. (VGS = 10 V, ID = 6.0 A)
• LOW Ciss Ciss = 1090 pF TYP.
• High Avalanche Capability Ratings
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)
Drain to Source Voltage
VDSS
250
V
Gate to Source Voltage
VGSS
±30
V
Drain Current (DC)
ID (DC)
±11
A
Drain Current (pulse)
ID (pulse)* ±44
A
Total Power Dissipation (TC = 25 °C) PT1
35 W
Total Power Dissipation (Ta = 25 °C) PT2
2.0 W
Storage Temperature
Tstg –55 to +150 °C
Channel Temperature
Tch 150 °C
Single Avalanche Current
IAS**
11
A
Single Avalanche Energy
EAS** 320
mJ
*PW ≤ 10 µs, Duty Cycle ≤ 1 %
**Starting Tch = 25 °C, RG = 25 Ω, VGS = 20 V → 0
PACKAGE DIMENSIONS
(in millimeters)
10.0 ± 0.3
φ3.2 ± 0.2
4.5 ± 0.2
2.7 ± 0.2
123
0.7 ± 0.1
2.54 TYP.
1.3 ± 0.2 0.65 ± 0.1
1.5 ± 0.2
2.54 TYP.
2.5 ± 0.1
123
1. Gate
2. Drain
3. Source
MP-45F(SIOLATED TO-220)
Drain (D)
The diode connected between the gate and source of the
transistor serves as a protector against ESD. When this device
is actually used, an additional protection circuit is externally
required if a voltage exceeding the rated voltage may be
applied to this device.
Gate (G)
Body diode
Source (S)
Document No. TC-2511
(O.D. No. TC–8070)
Date Published January 1995 P
Printed in Japan
© 1995
2SK2341
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTIC
SYMBOL
Drain to Source On-state Resistance RDS(on)
Gate to Source Cutoff Voltage
VGS(off)
Forward Transfer Admittance
yfs
Drain Leakage Current
IDSS
Gate to Source Leakage Current
IGSS
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Turn-On Delay Time
td(on)
Rise Time
tr
Turn-Off Delay Time
td(off)
Fall Time
tf
Total Gate Charge
QG
Gate to Source Charge
QGS
Gate to Drain Charge
QGD
Diode Forward Voltage
VF(S-D)
Reverse Recovery Time
trr
Reverse Recovery Charge
Qrr
MIN.
2.0
3.0
TYP.
0.21
1090
420
80
20
20
50
15
33
6.0
13
1.0
220
1.0
MAX.
0.26
4.0
100
±100
UNIT
Ω
V
S
µA
nA
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
µC
TEST CONDITIONS
VGS = 10 V, ID = 6 A
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 6 A
VDS = 250V, VGS = 0
VGS = ±30 V, VDS = 0
VDS = 10 V
VGS = 0
f = 1 MHz
VGS = 10 V
VDD = 150 V
ID = 6 A, RG = 10 Ω
RL = 25 Ω
VGS = 10 V
ID = 11 A
VDD = 200 V
IF = 11 A, VGS = 0
1F = 11 A
di/dt = 50 A/µs
Test Circuit 1 : Avalanche Capability
Test Circuit 2 : Switching Time
D.U.T.
RG = 25 Ω
PG.
VGS = 20 → 0 V
50 Ω
L
VDD
ID
VDD
IAS
BVDSS
VDS
Starting Tch
D.U.T.
PG.
RG
RG = 10 Ω
VGS
0
τ
τ = 1µs
Duty Cycle ≤ 1%
RL VGS
Wave
VDD Form
VGS
0 10 %
ID
VGS (on)
90 %
ID
Wave
Form
0 10 %
ID
td(on)
t tr d (off)
90 %
90 %
10 %
tf
t ton off
Test Circuit 3 : Gate Charge
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
2
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2SK2341 mosfet
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