NC7SZ373P6X 반도체 회로 부품 판매점
TinyLogic UHS D-Type Latch with 3-STATE Output
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 Fairchild |
June 1998
Revised May 2003
NC7SZ373
TinyLogic UHS D-Type Latch with 3-STATE Output
General Description
The NC7SZ373 is a single positive edge-triggered D-type
CMOS Latch with 3-STATE output from Fairchild’s Ultra
High Speed Series of TinyLogic in the space saving
SC70 6-lead package. The device is fabricated with
advanced CMOS technology to achieve ultra high speed
with high output drive while maintaining low static power
dissipation over a very broad VCC operating range. The
device is specified to operate over the 1.65V to 5.5V range.
The inputs and output are high impedance when VCC is 0V.
Inputs tolerate voltages up to 7V independent of VCC oper-
ating voltage. The latch appears transparent to the data
when Latch Enable (LE) is HIGH. When LE is LOW, the
data that meets the setup time is latched. The output toler-
ates voltages above VCC in the 3-STATE condition.
Features
s Space saving SC70 6-lead package
s Ultra small MicroPak leadless package
s Ultra High Speed; tPD 2.6 ns Typ into 50 pF at 5V VCC
s High Output Drive; ±24 mA at 3V VCC
s Broad VCC Operating Range; 1.65V to 5.5V
s Matches the performance of LCX when operated at
3.3V VCC
s Power down high impedance inputs/output
s Overvoltage tolerant inputs facilitate 5V to 3V translation
s Patented noise/EMI reduction circuitry implemented
Ordering Code:
Order
Number
NC7SZ373P6X
NC7SZ373L6X
Package
Number
MAA06A
MAC06A
Product Code
Top Mark
Package Description
Z73 6-Lead SC70, EIAJ SC88, 1.25mm Wide
D4 6-Lead MicroPak, 1.0mm Wide
Supplied As
3k Units on Tape and Reel
5k Units on Tape and Reel
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak is a trademark of Fairchild Semiconductor Corporation.
© 2003 Fairchild Semiconductor Corporation DS500157
www.fairchildsemi.com
Logic Symbol
IEEE/IEC
Connection Diagrams
Pin Assignments for SC70
Pin Descriptions
Pin Names
D
LE
OE
Q
Description
Data Input
Latch Enable Input
Output Enable Input
Latch Output
Function Table
Inputs
Output
LE D OE
Q
HL L
L
HH L
H
L X L Qn-1
XXH
Z
H = HIGH Logic Level X = Immaterial
L = LOW Logic Level Z = HIGH Impedance
Qn-1 = Previous state prior to HIGH-to-LOW transition of latch enable
(Top View)
Pin One Orientation Diagram
AAA = Product Code Top Mark - see ordering code
Note: Orientation of Top Mark determines Pin One location. Read the top
product code mark left to right, Pin One is the lower left pin.(see diagram).
Pad Assignments for MicroPak
(Top Thru View)
www.fairchildsemi.com
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제조업체: Fairchild
( fairchild )
NC7SZ373P6X latch
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국내 전력반도체 판매점
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전화번호 : 051-319-2877
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