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HD74LV1GT32A 반도체 회로 부품 판매점

2-input OR Gate / CMOS Logic Level Shifter



Renesas Technology 로고
Renesas Technology
HD74LV1GT32A 데이터시트, 핀배열, 회로
HD74LV1GT32A
2–input OR Gate / CMOS Logic Level Shifter
REJ03D0120-0900
Rev.9.00
Mar 21, 2008
www.DatDaSehesetc4Ur.nipet tion
The HD74LV1GT32A is high-speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low
power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of three stages construction
with buffer provides wide noise margin and stable output. The input protection circuitry on this device allows over
voltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0 V CMOS Logic to 5.0
V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high-voltage power supply.
Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the
low power consumption extends the battery life.
Features
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
Logic-level translate function
3.0 V CMOS logic 5.0 V CMOS logic (@VCC = 5.0 V)
1.8 V or 2.5 V CMOS logic 3.3 V CMOS logic (@VCC = 3.3 V)
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
HD74LV1GT32ACME
CMPAK–5 pin
PTSP0005ZC-A
(CMPAK-5V)
HD74LV1GT32AVSE
VSON–5 pin
PUSN0005KA-A
(TNP-5DV)
Note: Please consult the sales office for the above package availability.
Package
Abbreviation
CM
VS
Taping Abbreviation
(Quantity)
E (3000 pcs/reel)
E (3000 pcs/reel)
REJ03D0120-0900 Rev.9.00, Mar 21, 2008
Page 1 of 6


HD74LV1GT32A 데이터시트, 핀배열, 회로
HD74LV1GT32A
Outline and Article Indication
HD74LV1GT32A
CMPAK–5
HD74LV1GT32A
VSON–5
Function Table
H : High level
L : Low level
A
L
H
L
H
Inputs
Index band
Marking
T4
= Control code
Marking
T4
= Control code
Output Y
B
LL
LH
HH
HH
REJ03D0120-0900 Rev.9.00, Mar 21, 2008
Page 2 of 6




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2-input OR Gate / CMOS Logic Level Shifter - Renesas Technology