SL74HC533 반도체 회로 부품 판매점
Octal 3-State Inverting Transparent Latch(High-Performance Silicon-Gate CMOS)
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 System Logic Semiconductor |
SL74HC533
Octal 3-State Inverting Transparent Latch
High-Performance Silicon-Gate CMOS
The SL74HC533 is identical in pinout to the LS/ALS533. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. The data appears as the
outputs in inverted form. When Latch Enable goes low, data meeting
the setup and hold time becomes latched.
The Output Enable input does not affect the state of the latches,
but when Output Enable is high, all device outputs are forced to the
high-impedance state. Thus, data may be latched even when the
outputs are not enabled.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
SL74HC533N Plastic
SL74HC533D SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 20=VCC
PIN 10 = GND
FUNCTION TABLE
Inputs
Output
Output Latch D
Enable Enable
Q
L HHL
L H LH
L L X no
change
HX
X = don’t care
Z = high impedance
X
Z
SLS
System Logic
Semiconductor
SL74HC533
MAXIMUM RATINGS*
Symbol
VCC
VIN
VOUT
IIN
IOUT
ICC
PD
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Value
-0.5 to +7.0
-1.5 to VCC +1.5
-0.5 to VCC +0.5
±20
±35
±75
750
500
Tstg Storage Temperature
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
-65 to +150
260
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
Unit
V
V
V
mA
mA
mA
mW
°C
°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
VIN, VOUT
TA
tr, tf
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time (Figure 1)
VCC =2.0 V
VCC =4.5 V
VCC =6.0 V
Min Max Unit
2.0 6.0
V
0 VCC V
-55 +125 °C
0 1000 ns
0 500
0 400
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range
GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.
SLS
System Logic
Semiconductor
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SL74HC533 gate
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국내 전력반도체 판매점
상호 : 아이지 인터내셔날
전화번호 : 051-319-2877
[ 홈페이지 ]
IGBT, TR 모듈, SCR, 다이오드모듈, 각종 전력 휴즈
( IYXS, Powerex, Toshiba, Fuji, Bussmann, Eaton )
전력반도체 문의 : 010-3582-2743
관련 데이터시트
SL74HC533
Octal 3-State Inverting Transparent Latch(High-Performance Silicon-Gate CMOS) - System Logic Semiconductor
SL74HC533D
Octal 3-State Inverting Transparent Latch(High-Performance Silicon-Gate CMOS) - System Logic Semiconductor
SL74HC533N
Octal 3-State Inverting Transparent Latch(High-Performance Silicon-Gate CMOS) - System Logic Semiconductor
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Octal 3-State Inverting D Flip-Flop(High-Performance Silicon-Gate CMOS) - System Logic Semiconductor
SL74HC534D
Octal 3-State Inverting D Flip-Flop(High-Performance Silicon-Gate CMOS) - System Logic Semiconductor
SL74HC534N
Octal 3-State Inverting D Flip-Flop(High-Performance Silicon-Gate CMOS) - System Logic Semiconductor