IR2117SPBF 반도체 회로 부품 판매점
SINGLE CHANNEL DRIVER
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 International Rectifier |
Data Sheet No. PD60146 Rev O
IR2117(S)/IR2118(S) &(PbF)
SINGLE CHANNEL DRIVER
Features
• Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
• Gate drive supply range from 10 to 20V
• Undervoltage lockout
• CMOS Schmitt-triggered inputs with pull-down
• Output in phase with input (IR2117) or out of
phase with input (IR2118)
• Also available LEAD-FREE
Description
Product Summary
VOFFSET
600V max.
IO+/-
200 mA / 420 mA
VOUT
10 - 20V
ton/off (typ.)
125 & 105 ns
Packages
The IR2117/IR2118(S) is a high voltage, high speed
power MOSFET and IGBT drive.rProprietary HVIC and
latch immune CMOS technologies enable ruggedized
monolithic construction. The logic input is compatible
with standard CMOS outputs. The output driver fea-
tures a high pulse current buf fer stage designed for
minimum cross-conduction. The floating channel can
be used to drive an N-channel power MOSFET or IGBT
in the high or low side configuration which operates up
to 600 volts.
8-Lead PDIP
IR2117/IR2118
8-Lead SOIC
IR2117S/IR2118S
Typical Connection
up to 600V
V VVCC CC B
IN IN HO
COM VS
IR2117
TO
LOAD
up to 600V
VCC
IN
(Refer to Lead Assignments for correct pin configuration).
This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for
proper circuit board layout.
VCC
IN
COM
VB
HO
VS
IR2118
TO
LOAD
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1
http://www.Datasheet4U.com
IR2117(S)/IR2118(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 5 through 8.
Symbol
Definition
Min.
Max. Units
VB
VS
VHO
VCC
VIN
dVs/dt
PD
High side floating supply voltage
High side floating supply offset voltage
High side floating output voltage
Logic supply voltage
Logic input voltage
Allowable offset supply voltage transient (figure 2)
Package power dissipation @ TA ≤ +25°C
(8 lead PDIP)
(8 lead SOIC)
-0.3
VB - 25
VS - 0.3
-0.3
-0.3
—
—
—
625
VB + 0.3
VB + 0.3
25
VCC + 0.3
50
1.0
0.625
V
V/ns
W
RthJA
Thermal resistance, junction to ambient
(8 lead PDIP)
(8 lead SOIC)
—
—
125 °C/W
200
TJ Junction temperature
TS Storage temperature
TL Lead temperature (soldering, 10 seconds)
— 150
-55 150 °C
— 300
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V dif ferential.
Symbol
VB
VS
VHO
VCC
VIN
TA
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Logic supply voltage
Logic input voltage
Ambient temperature
Min.
VS + 10
Note 1
VS
10
0
-40
Max.
VS + 20
600
VB
20
VCC
125
Units
V
°C
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
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IR2117SPBF driver
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