QS532807 반도체 회로 부품 판매점
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
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 Integrated Device Technology |
QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
GUARANTEED LOW SKEW
CMOS CLOCK
DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
QS532807
FEATURES:
− JEDEC compatible LVTTL level
− 10 low skew clock outputs
− Clock input is 5V tolerant
− Pinout and function compatible with QS5807
− 25Ω on-chip resistors available for low noise
− Input hysteresis for better noise margin
− Guaranteed low skew:
• 0.35ns output skew (same bank)
• 0.6ns output skew (different bank)
• 0.75ns part-to-part skew
− Available in QSOP and SOIC packages
DESCRIPTION:
The QS532807 clock driver/buffer circuit can be used for clock
buffering schemes where low skew is a key parameter. The QS532807
offers ten non-inverting outputs. Designed in IDT's proprietary QCMOS
process, these devices provide low propagation delay buffering with on-
chip skew of 0.35ns for same-transition, same bank signals. The
QS532807 has on-chip series termination resistors for lower noise clock
signals. The QS532807 series resistor version is recommended for
driving unterminated lines with capacitive loading and other noise
sensitive clock distribution circuits. These clock buffer products are
designed for use in high-performance workstations, embedded and
personal computing systems. Several devices can be used in parallel
or scattered throughout a system for guaranteed low skew, system-wide
clock distribution networks.
FUNCTIONAL BLOCK DIAGRAM
www.DataSheet4U.com
IN
INDUSTRIAL TEMPERATURE RANGE
c 1999 Integrated Device Technology, Inc.
1
O1
O2
O3
O4
O5
O6
O7
O8
O9
O 10
SEPTEMBER 2000
DSC - 5848
QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
INDUSTRIALTEMPERATURERANGE
PIN CONFIGURATION
IN
GND
O1
VCC
O2
GND
O3
VCC
O4
GND
1 20
2 19
3 18
4 17
5 SO 20-2 16
6 SO 20-8 15
7 14
8 13
9 12
10 11
VCC
O 10
O9
GND
O8
VCC
O7
GND
O6
O5
QSOP/ SOIC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
VTERM(2)
VTERM(3)
VAC
IOUT
Description
Max. Unit
Supply Voltage to Ground
– 0.5 to +4.6 V
DC Output Voltage VOUT
– 0.5 to VCC+0.5 V
DC Input Voltage VIN
– 0.5 to +7 V
AC Input Voltage (pulse width ≤20ns)
-3 V
DC Output Current VIN < 0
-20 mA
DC Output Current Max. Sink Current/Pin
120
mA
TSTG Storage Temperature
TJ Junction Temperature
– 65 to +150 °C
150 °C
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. Vcc Terminals.
3. All terminals except Vcc.
CAPACITANCE (TA = +25OC, f = 1.0MHz, VIN = 0V)
QSOP
SOIC
Pins Typ. Max. (1) Typ. Max. (1)
CIN 3 6 5 7
NOTE:
1. This parameter is guaranteed but not production tested.
Unit
pF
www.DataSheet4U.com
PIN DESCRIPTION
Pin Names
IN
Ox
I/O Description
I Clock Input
O Clock Outputs
2
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PDF 파일 내의 페이지 : 총 6 페이지
제조업체: Integrated Device Technology
( idt )
QS532807 driver
데이터시트 다운로드 :
[ QS532807.PDF ]
[ QS532807 다른 제조사 검색 ]
국내 전력반도체 판매점
상호 : 아이지 인터내셔날
전화번호 : 051-319-2877
[ 홈페이지 ]
IGBT, TR 모듈, SCR, 다이오드모듈, 각종 전력 휴즈
( IYXS, Powerex, Toshiba, Fuji, Bussmann, Eaton )
전력반도체 문의 : 010-3582-2743
관련 데이터시트
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GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER - Integrated Device Technology
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GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER - Integrated Device Technology
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QS532806A
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QS532807
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER - Integrated Device Technology