LMH0050 반도체 회로 부품 판매점
(LMH0xxx) DVB-ASI SDI Serializer and Driver
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 National Semiconductor |
ADVANCE INFORMATION
April 2007
LMH0340, LMH0040, LMH0070, LMH0050
3G, HD, SD, DVB-ASI SDI Serializer and Driver with LVDS
Interface
General Description
The LMH0040 family of products provide a very simple 5:1
serializer and transmitter function, intended to be paired with
an FPGA host which will format the data appropriately such
that the output of the LMH0040 will be compliant with the out-
put requirements of DVB-ASI, SMPTE 259M, and SMPTE
292M. The LMH0340 adds support for SMPTE 424M, the
LMH0070 supports 270 Mbps operation only, and the
LMH0050 requires an external cable driver. Throughout this
document, if not explicitly stated, when the LMH0040 is re-
ferred to this includes all members of the family. The interface
between the LMH0040 and the FPGA consists of a 5 bit wide
LVDS bus, an LVDS clock and an SMBus interface. The
product is packaged in a physically small 48 pin LLP package.
Key Specifications
■ Output compliant with SMPTE 424M, SMPTE 292M,
SMPTE 259M-C and DVB-ASI
■ Typical power dissipation: 420 mW
■ Typical output jitter <53 ps (HD, 3G)
Features
■ LVDS Interface
■ No external VCO or clock required
■ Integrated Variable output Cable Driver
■ 3.3V SMBus configuration interface
■ 48pin LLP package
Applications
■ SDI interfaces for:
— Video Cameras
— DVRs
— Video Switchers
— Video Editing Systems
Block Diagram
© 2007 National Semiconductor Corporation 300170
30017001
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TABLE 1. Feature Table
Device SMPTE 424M
Support
LMH0340
X
LMH0040
LMH0070
LMH0050
SMPTE 292M
Support
X
X
X
SMPTE 259M
Support
X
X
X
X
DVB-ASI Support SMPTE Compliant
cable driver
XX
XX
XX
X
Device Operation
The LMH0040 serializer is used in digital video signal origi-
nation equipment. It is intended to be operated in conjunction
with an FPGA host which preprocesses data for it, and then
provides this data over the five bit wide datapath. Provided
the host has properly formatted the data for the LMH0040, the
output of the device will be compliant with DVB-ASI, SMPTE
259M-C, SMPTE 292M or SMPTE 424M depending upon the
output mode selected.
high, then the four bit nibbles from TX0–TX3 are taken to form
an 8 bit word, which is then converted to a 10 bit code via an
internal 8b10b encoder and this 10 bit word is serialized and
driven on the output. The nibble taken in on the rising edge of
the clock is the most significant nibble and the nibble taken in
on the falling edge is the least significant nibble. If TX4+/TX4-
is low, then the input on TX0–TX3 are ignored and the 10b
idle character is inserted in the output stream.
DVB_ASI Mode
The LMH0040 has a special mode for DVB-ASI. In this mode,
the input signal on TX4+/TX4- is treated as a data valid bit, if
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LMH0050 driver
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국내 전력반도체 판매점
상호 : 아이지 인터내셔날
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