UPD4721 반도체 회로 부품 판매점
RS-232 LINE DRIVER/RECEIVER AT 3.3 V/5 V
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 NEC |
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD4721
RS-232 LINE DRIVER/RECEIVER AT 3.3 V/5 V
The µPD4721 is a high-breakdown voltage silicon gate CMOS line driver/receiver based on the EIA/TIA-232-
E standard. The internal DC/DC converter can switch between multiple voltages, realizing the allowing it to
operate with a single +3.3 V or +5 V power supply. It also provides standby function.
This IC incorporates 2 driver circuits and 2 receiver circuits. An RS-232 interface circuit can be easily
configured by connecting 5 capacitors externally.
FEATURES
• Conforms to EIA/TIA-232-E (former name, RS-232C) standards
• Selectable +3.3 V/+5 V single power supply (selected by VCHA pin)
• By setting the standby pin to a low level (standby mode), circuit current can be reduced. At such times,
the driver output is in a high-impedance state.
ORDERING INFORMATION
Part number
µPD4721GS-GJG
Package
20-pin plastic SSOP (300 mil)
Document No. S12198EJ2V0DS00 (2nd edition)
(Previous No. IC-3279)
Date Published January 1997 N
Printed in Japan
© 1993
BLOCK DIAGRAM/PIN CONFIGURATION (Top View)
µPD4721
+3.3 V
or
+5 V
C1 +
+10 V
C3 +
1 VDD
2 C1+
3 VCC
C5 +
4 C1–
5 C5+
6 C5–
DIN1 7
Note 4
DIN2 8
C4+ 20
GND 19
C4– 18
+
C4
+
C2
VSS 17
16 STBY
–10 V
300 Ω
300 Ω
15 VCHA
14 DOUT1
13 DOUT2
ROUT1 9
ROUT2 10
5.5 kΩ
5.5 kΩ
12 RIN1
11 RIN2
Note 1. VDD and VSS are output pins stepped up internally. These pins should not be loaded directly.
2. Capacitors C1 to C5 with a breakdown voltage of 20 V or higher are recommended. And it is
recommended to insert the capacitor that is 0.1 µF to 1 µF between VCC and GND.
3. If VCHA is kept low level (in 5 V mode), capacitor C5 is not necessary.
4. The pull-up resistors at driver input are active resistors.
2
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UPD4721 driver
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국내 전력반도체 판매점
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