DF5G7M2N 반도체 회로 부품 판매점
ESD Protection Diodes
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 Toshiba |
ESD Protection Diodes Silicon Epitaxial Planar
DF5G7M2N
DF5G7M2N
1. Applications
ESD Protection
Note: This product is designed for protection against electrostatic discharge (ESD) and is not intended for any other
purpose, including, but not limited to, voltage regulation.
2. Packaging and Internal Circuit
DFN5
1 : I/O 1
2 : GND
3 : I/O 2
4 : I/O 3
5 : I/O 4
3. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25)
Characteristics
Symbol
Note
Rating
Unit
Electrostatic discharge voltage (IEC61000-4-2)(Contact)
VESD
(Note 1)
±12
kV
Electrostatic discharge voltage (IEC61000-4-2)(Air)
±15
Peak pulse power
PPK 50 W
Peak pulse current
IPP (Note 2)
2.5
A
Junction temperature
Storage temperature
Tj 150
Tstg -55 to 150
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: According to IEC61000-4-2.
Note 2: According to IEC61000-4-5.
Start of commercial production
2015-04
1 2015-06-30
Rev.2.0
4. Electrical Characteristics (Unless otherwise specified, Ta = 25)
VRWM: Working peak reverse
voltage
VBR: Reverse breakdown voltage
IBR: Reverse breakdown current
IR: Reverse current
VC: Clamp voltage
IPP: Peak pulse current
RDYN: Dynamic resistance
DF5G7M2N
Fig. 4.1 Definitions of Electrical Characteristics
Characteristics
Symbol Note
Test Condition
Min Typ. Max Unit
Working peak reverse voltage
VRWM
5.5 V
Reverse breakdown voltage
VBR
IBR = 1 mA
6.0 11 V
Reverse current
IR VRWM = 5.5 V
0.5 µA
Clamp voltage
VC (Note 1) IPP = 1 A
12.5
V
IPP = 2.5 A
16 20
Dynamic resistance
RDYN (Note 2)
1.0
Ω
Total capacitance
Ct (Note 3) VR = 0 V, f = 1 MHz
0.2 0.4 pF
Note 1: Based on IEC61000-4-5 8/20 µs pulse.
Note 2: TLP parameter: Z0 = 50 Ω, tp = 100 ns, tr = 300 ps, averaging window: t1 = 30 ns to t2 = 60 ns,
extraction of dynamic resistance using a least-squares fit of TLP characteristics at IPP between 8 A to 16 A.
Note 3: Guaranteed by design.
2 2015-06-30
Rev.2.0
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제조업체: Toshiba
( toshiba )
DF5G7M2N diode
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