파트넘버.co.kr D5NM50 데이터시트 PDF


D5NM50 반도체 회로 부품 판매점

STD5NM50



STMicroelectronics 로고
STMicroelectronics
D5NM50 데이터시트, 핀배열, 회로
STD5NM50
STD5NM50-1
N-CHANNEL 500V - 0.7- 7.5A DPAK/IPAK
MDmesh™Power MOSFET
TYPE
VDSS
RDS(on)
ID
STD5NM50
STD5NM50-1
500V
500V
<0.8
<0.8
7.5 A
7.5 A
n TYPICAL RDS(on) = 0.7
n HIGH dv/dt AND AVALANCHE CAPABILITIES
n 100% AVALANCHE TESTED
n LOW INPUT CAPACITANCE AND GATE
CHARGE
n LOW GATE INPUT RESISTANCE
n TIGHT PROCESS CONTROL AND HIGH
MANUFACTURING YIELDS
DESCRIPTION
The MDmesh™ is a new revolutionary MOSFET
technology that associates the Multiple Drain pro-
cess with the Company’s PowerMESH™ horizontal
layout. The resulting product has an outstanding low
on-resistance, impressively high dv/dt and excellent
avalanche characteristics. The adoption of the
Company’s proprietary strip technique yields overall
dynamic performance that is significantly better than
that of similar competition’s products.
APPLICATIONS
The MDmesh™ family is very suitable for increasing
power density of high voltage converters allowing
system miniaturization and higher efficiencies.
3
1
DPAK
TO-252
3
2
1
IPAK
TO-251
(Add Suffix “-1”)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
VDGR
VGS
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 k)
Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM (l) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
dv/dt (1) Peak Diode Recovery voltage slope
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
September 2002
Value
500
500
±30
7.5
4.7
30
100
0.8
15
Unit
V
V
V
A
A
A
W
W/°C
V/ns
– 55 to 150
°C
(1) ISD 5A, di/dt 400A/µs, VDD V(BR)DSS, Tj TJMAX.
1/10


D5NM50 데이터시트, 핀배열, 회로
STD5NM50/STD5NM50-1
THERMAL DATA
Rthj-case Thermal Resistance Junction-case
Max
Rthj-amb Thermal Resistance Junction-ambient
Max
Tl Maximum Lead Temperature For Soldering Purpose
1.25
100
300
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Max Value
2.5
300
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
Parameter
Test Conditions
Min. Typ. Max.
V(BR)DSS Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
500
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
10
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ±30V
±100
°C/W
°C/W
°C
Unit
A
mJ
Unit
V
µA
µA
nA
ON (1)
Symbol
VGS(th)
RDS(on)
Parameter
Gate Threshold Voltage
Static Drain-source On
Resistance
Test Conditions
VDS = VGS, ID = 250µA
VGS = 10V, ID = 2.5A
Min.
3
Typ.
4
0.7
Max.
5
0.8
Unit
V
DYNAMIC
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS = 25Vx, ID = 2.5A
3.5 S
Ciss Input Capacitance
VDS = 25V, f = 1 MHz, VGS = 0
415
pF
Coss
Output Capacitance
88 pF
Crss Reverse Transfer
Capacitance
12 pF
Coss eq. (2) Equivalent Output
Capacitance
VGS = 0V, VDS = 0V to 400V
50 pF
RG Gate Input Resistance
f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
3
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS.
2/10




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