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BUK9E2R3-40E 반도체 회로 부품 판매점

N-channel TrenchMOS logic level FET



NXP Semiconductors 로고
NXP Semiconductors
BUK9E2R3-40E 데이터시트, 핀배열, 회로
BUK9E2R3-40E
N-channel TrenchMOS logic level FET
11 September 2012
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in a SOT226 package using TrenchMOS technology.
This product has been designed and qualified to AEC Q101 standard for use in high
performance automotive applications.
1.2 Features and benefits
AEC Q101 compliant
Repetitive avalanche rated
Suitable for thermally demanding environments due to 175 °C rating
True logic level gate with Vgst(th) rating of greater than 0.5V at 175 °C
1.3 Applications
12 V Automotive systems
Motors, lamps and solenoid control
Start-Stop micro-hybrid applications
Transmission control
Ultra high performance power switching
1.4 Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
ID
drain current
VGS = 5 V; Tmb = 25 °C; Fig. 1
[1]
Ptot total power dissipation Tmb = 25 °C; Fig. 2
Static characteristics
RDSon
drain-source on-state VGS = 5 V; ID = 25 A; Tj = 25 °C; Fig. 11
resistance
Dynamic characteristics
QGD
gate-drain charge
VGS = 5 V; ID = 25 A; VDS = 32 V;
Fig. 13; Fig. 14
[1] Continuous current is limited by package.
Min Typ Max Unit
- - 40 V
- - 120 A
- - 293 W
- 2.1 2.5 mΩ
- 29.6 - nC
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BUK9E2R3-40E 데이터시트, 핀배열, 회로
NXP Semiconductors
BUK9E2R3-40E
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2. Pinning information
Pin Symbol Description
Simplified outline
1 G gate
mb
2 D drain
3 S source
mb D
mounting base; connected to
drain
123
I2PAK (SOT226)
Graphic symbol
D
G
mbb076 S
3. Ordering information
Table 3. Ordering information
Type number
Package
Name
BUK9E2R3-40E
I2PAK
Description
plastic single-ended package (I2PAK); TO-262
Version
SOT226
4. Marking
Table 4. Marking codes
Type number
BUK9E2R3-40E
Marking code
BUK9E2R3-40E
5. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
VDGR
drain-gate voltage
RGS = 20 kΩ
VGS gate-source voltage
Tj ≤ 175 °C; DC
Tj ≤ 175 °C; Pulsed
ID drain current
Tmb = 25 °C; VGS = 5 V; Fig. 1
Tmb = 100 °C; VGS = 5 V; Fig. 1
IDM peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 4
Ptot
total power dissipation
Tmb = 25 °C; Fig. 2
BUK9E2R3-40E
Product data sheet
All information provided in this document is subject to legal disclaimers.
11 September 2012
[1][2]
[3]
[3]
Min
-
-
-10
-15
-
-
-
-
Max Unit
40 V
40 V
10 V
15 V
120 A
120 A
988 A
293 W
© NXP B.V. 2012. All rights reserved
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N-channel TrenchMOS logic level FET - NXP Semiconductors