AN1025 반도체 회로 부품 판매점
Converting A 5.0V Supply Rail To A Regulated 3.0V
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 Microchip |
AN1025
Converting A 5.0V Supply Rail To A Regulated 3.0V
Author: Cliff Ellison
Microchip Technology Inc.
INTRODUCTION
As system designers are forced to produce products
with increased features while maintaining a flat or
decreasing product cost, advancements in device
technology must be considered. To produce Integrated
Circuits (IC) with increased functionality at a
reasonable cost, IC manufacturers need to reduce the
overall silicon area. However, the functional and cost
benefits associated with smaller areas can not be
achieved without some system design trade-offs.
These smaller geometry ICs typically have a maximum
voltage rating of 3.0V or below, instead of the existing
maximum 5.0V rating.
This application note is intended to provide the system
designer with an overview of different options that
could be used to down convert an existing 5.0V system
rail to a regulated 3.0V.
The approaches discussed in this application note are
the Low Dropout Regulator (LDO), charge pump and
buck switch mode converter. Other options exist, but
they do not provide a regulated 3.0V. A summary of
these options, as well as a reference section containing
detailed design application note titles and data sheets,
appears at the end of the document.
LOW DROPOUT REGULATOR
A simple way of converting the 5.0V bus voltage to the
required regulated 3.0V is by using a low dropout
regulator. An LDO is nothing more than a three terminal
linear system providing closed-loop control. The
solution is easy to implement, requiring only the device
itself and an input and output capacitor.
LDO Operation
In Figure 1, we can see that an LDO is built from four
main elements: 1) pass transistor, 2) bandgap
reference, 3) operational amplifier, and 4) feedback
resistors. An LDO can be thought of as a variable
resistor. The output voltage is divided down by the
resistor divider and compared to a fixed bandgap
reference voltage. The operational amplifier controls
the drive to the pass transistor accordingly to equalize
the voltage on its inputs. The difference between the
bus voltage and the required output voltage is dropped
across the pass transistor. When the pass transistor,
shown as a P-Channel MOSFET, is turned fully ON,
there will be some finite amount of resistance and
therefore a voltage drop. This minimum voltage drop,
VDROPOUT, will set how much higher the bus voltage
needs to be when compared to the output voltage in
order to regulate the output.
Designing With An LDO
Generating a well regulated 3.0V output is very easy
with an LDO. There are just a couple of specifications
that the circuit designer should take into consideration
when using an LDO. One specification is the output
voltage. Many LDOs are supplied in standard fixed out-
put voltages which typically include 3.0V. However,
some LDOs are offered with an adjustable output volt-
age. This requires the designer to use an external feed-
back resistor divider.
Another LDO specification is the typical dropout
voltage at load. The sum of the output voltage and the
typical dropout voltage must be less than the minimum
input voltage. If the sum is greater, the LDO will not be
able to regulate the output at minimum input voltages.
A very important specification that should not be over
looked is the requirements that some LDOs place on
the output capacitor. Certain LDOs require the output
capacitor to be either tantalum or aluminum electrolytic
to produce a stable system. These capacitors have a
large Equivalent Series Resistance (ESR) when
compared to ceramic capacitors. Tantalum or
aluminum electrolytic capacitors are normally cheaper
than ceramic capacitors when a large value of
capacitance is needed, but they are also usually larger
in size.
© 2006 Microchip Technology Inc.
DS01025A-page 1
Free Datasheet http://www.datasheet4u.com/
AN1025
IIN
VIN
VREF
CIN
IOUT
COUT RL
IGND
FIGURE 1:
Basic LDO System Schematic.
Understanding LDO IGND Specifications
There are three current elements, IIN, IOUT and IGND,
labeled in Figure 1. IGND is the current used by the LDO
to perform the regulating operation and is often referred
to as the quiescent current (Iq) for no load conditions.
Since the specified Iq varies greatly depending on the
specific LDO or particular manufacture, it is important
to understand how this one specification impacts the
system performance.
An LDO can form a very efficient step-down regulator.
When the LDO output current is much greater than the
device quiescent current, the system efficiency is found
by dividing the output voltage by the input voltage. This
is shown in Equation 1.
EQUATION 1:
Efficiency = -V---VO----I-U-N----T--
When: IGND << IOUT
System efficiency at lighter load currents is one of the
impacts Iq has on the system performance. In basic
terms, an LDO with a low Iq will only be more efficient
at lighter loads. This is because as the load current
increases, the Iq is only a small percentage of the total
IIN. The efficiency of two Microchip LDOs, the
MCP1700 and TC1017, is shown in Figure 2. Notice
how the efficiency of the MCP1700 is vastly greater
than the TC1017 at light loads since the TC1017 has a
higher IQ.
70
60 MCP1700
50
40
30
20
10
0
0.01
TC1017
0.10
1.00
VIN = 5.0V
VOUT = 3.0V
10.00
100.00
Output Current (mA)
FIGURE 2:
LDO Efficiency Comparison.
System line and load step performance is greatly
improved on LDOs that have higher Iq. Since the Iq is
used by the LDO to preform the regulating operation, it
can respond quicker to a sudden change in load
requirements or line voltage.
DS01025A-page 2
© 2006 Microchip Technology Inc.
Free Datasheet http://www.datasheet4u.com/
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