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ROHM Semiconductor |
◇ STRUCTURE
◇ PRODUCT
◇ PART NUMBER
Silicon Monolithic Integrated Circuit
I2C BUS 128Kbit (16,384×8bit) EEPROM
BU9897GUL-W
PART NUMBER
BU9897GUL-W
PACKAGE
VCSP50L2
◇FEATURES
Two wire serial interface
Wide operating voltage range (1.7V~5.5V)
Endurance : 1,000,000 erase/write cycles
◇ ABSOLUTE MAXIMUM RATING (Ta=25℃)
Parameter
Symbol
Rating
Supply Voltage Vcc -0.3~6.5
Power Dissipation
Pd
220
Storage Temperature
Tstg
-65~125
Operating Temperature
Topr
-40~85
Terminal Voltage
- -0.3~Vcc+1.0
*1 2.2mW/℃(*1) for operation above 25℃
*2 The Max value of Terminal Voltage is not over 6.5V
◇ RECOMMENDED OPERATING CONDITION
Parameter
Supply Voltage
Input Voltage
Symbol
Vcc
VIN
Rating
1.7~5.5
0~Vcc
www.DataSheet.co.kr
Unit
V
V
*1
*2
Unit
V
mW
℃
℃
V
1/4
REV. B
Datasheet pdf - http://www.DataSheet4U.net/
◇MEMORY CELL CHARACTERISTICS (Ta=25℃, Vcc=1.7~5.5V)
Parameter
Specification
Min. Typ.
Write/Erase Cycle
*1 1,000,000
-
Data Retention
*1
40
-
○Initial Data FFh in all address.
Max.
-
-
Unit
Cycles
Years
*1 Not 100% TESTED
2/4
◇DC OPERATING CHARACTERISTICS
Parameter
Symbol
"H" Input Voltage1
"L" Input Voltage1
"L" Output Voltage1
"L" Output Voltage2
Input Leakage
Current
Output Leakage
Current
Operating Current
VIH1
VIH2
VOL1
VOL2
ILI
ILO
ICC1
ICC2
Standby Current
ISB
Specification
Min. Min. Min.
0.7Vcc - Vcc+1.0
Unit
V
Specification
-0.3 - 0.3Vcc V
- - 0.4
- - 0.2
V
IOL=3.0mA,2.5V≦Vcc≦
5.5V(SDA)
V
IOL=0.7mA,1.7V≦Vcc<
2.5V(SDA)
-1 - 1 μA
VIN=0V~Vcc
-1 - 1 μA VOUT=0V~Vcc(SDA)
Vcc=5.5V,fSCL=400kHz,
- - 2.5 mA
tWR=5ms
Byte Write,Page Write
Vcc=5.5V,fSCL=400kHz
- - 0.5 mA Random Read,Current
Read,Sequential Read
-
-
2.0
μA
Vcc=5.5V,SDA,SCL=Vcc
A0,A1,A2=GND,WP=GND
www.DataSheet.co.kr
◇AC OPERATING CHARACTERISTICS
(Unless otherwise specified Ta=-40~85℃, Vcc=1.7~5.5V)
Parameter
Symbol
Specification
Min. Typ. Max.
Unit
Clock Frequency
Data Clock High
Period
Data Clock Low
Period
SDA and SCL
Rise Time *1
SDA and SCL
Fall Time *1
Start Condition
Hold Time
Start Condition
Setup Time
Input Data Hold
Time
Input Data Setup
Time
Output Data
Delay Time
Output Data Hold
Time
Stop Condition
Setup Time
Bus Free Time
fSCL
tHIGH
tLOW
tR
tF
tHD:STA
tSU:STA
tHD:DAT
tSU:DAT
tPD
tDH
tSU:STO
tBUF
-
0.6
1.2
-
-
0.6
0.6
0
100
0.1
0.1
0.6
1.2
- 400 kHz
- - μs
- - Μs
- 0.3 Μs
- 0.3 Μs
- - Μs
- - μs
- - ns
- - ns
- 0.9 μs
- - μs
- - μs
- - μs
Write Cycle Time
tWR
- - 5 ns
Noise Spike
Width (SDA and
SCL)
tI
- - 0.1 μs
WP Hold Time
tHD:WP
0
- - ns
WP Setup Time
tSU:WP
0.1
-
- μs
WP High Period
tHIGH:WP
1.0
-
- μs
*1 Not 100% TESTED
◇BLOCK DIAGRAM
A0 B3
A1 C3
A2 C2
128Kbit EEPROM ARRAY
14bit
ADDRESS
DECODER
SLAVE, WORD
14bit ADDRESS REGISTER
8bit
DATA
REGISTER
START
STOP
CONTROL LOGIC
ACK
◇PIN No. NAME
A3 Vcc
A2 WP
A1 SCL
PIN No.
A1
A2
A3
A4
B1
B3
B4
C1
C2
C3
C4
PIN NAME
SCL
WP
Vcc
GND
SDA
A0
GND
GND
A2
A1
GND
GND C1 HIGH VOLTAGE GEN.
VCC LEVEL DETECT
B1 SDA
Fig.-1 BLOCK DIAGRAM
REV. B
Datasheet pdf - http://www.DataSheet4U.net/
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