HT16565 반도체 회로 부품 판매점
24 Hour System VFD Digital Clock
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 Holtek Semiconductor |
DataSheet.in
HT16565
24 Hour System VFD Digital Clock
Features
· VFD display 24 hour clock function
· 4.194304MHz crystal oscillation
· Zero adjust function
· Integrated voltage regulator permits wide 4V to 16V
operating voltage range
· Four level contrast control function
· 44-pin QFP package
General Description
The HT16565 provides direct drive to VFD panels to im-
plement a 24 hour clock function. In addition to obtaining
its time base from a 4.194304MHz crystal oscillation
source and in having a wide operating voltage, the de-
vice also contains a host of other features. These in-
clude a choice of adjustment modes, including single
push increment or 2Hz fast forward functions. Additional
features are provided in the form of Zero adjustment and
four levels of contrast control.
Block Diagram
O SCO
O SCI
TEST3
TEST2
TEST1
A /C
SE
ZA
MS
HS
O s c illa to r
V DD
T est
A d ju s tm e n t
V DD V DD
F r e q u e n c y D iv id e r s 1 H z
S e c o n d C o u n te r
M in u te C o u n te r
H o u r C o u n te r
CM OS
D ecoder
S egm ent
D ecoder
S egm ent
64H z
1H z
a1
b1
c1
C O N T2
C O N T1
D IM
V DD
C o n tra s t
A d ju s tm e n t
g3
b4
c4
a4,d4
e4,g4
TEST4
S 1224
V DD
V DD
Rev. 1.00
1 February 7, 2007
DataSheet.in
Pin Assignment
44 43 42 41 40 39 38 37 36 35 34
g3 1
33 b4
e3 2
3 2 f3
d3 3
31 a3
c3 4
30 b3
g2 5
e2 6
c2 7
H T16565
4 4 Q F P -A
29 1H z
2 8 f2
27 a2,d2
g1 8
26 b2
e1 9
2 5 f1
d1 10
24 a1
c1 11
23 b1
12 13 14 15 16 17 18 19 20 21 22
HT16565
c4
e4,g4
ZA
TEST1
TEST4
NC
TEST3
TEST2
MS
HS
a4,d4
44 43 42 41 40 39 38 37 36 35 34
1 33
2 32
3 31
4 30
5
H T16565B
29
6
4 4 Q F P -B
28
7 27
8 26
9 25
10 24
11 23
12 13 14 15 16 17 18 19 20 21 22
64H z
D IM
SE
VDD
C O N T1
NC
C O N T2
VSS
O SCI
O SCO
A /C
Pin Description
Pin Name
VDD
I/O
O High voltage power supply pin.
Description
VSS
¾ Ground pin.
DIM
CONT1
I Illumination level control pins.
I Internally connected to pull-down resistors.
CONT2
I
Illumination level control pins.
Internally connected to pull-up resistors.
When the A/C pin is low, the internal circuits are reset.
A/C I The reset pulse width should be more than 2ms.
Internally connected to a pull-up resistor.
ZA
I
Zero adjustment pin.
Internally connected to a pull-down resistor.
HS
I
Hour adjustment pin.
Internally connected to a pull-down resistor.
MS
I
Minute adjustment pin.
Internally connected to a pull-down resistor.
SE
I
Set enable pin.
Internally connected to a pull-up resistor.
OSCO
OSCI
O
Crystal oscillator pin
I
TEST1, TEST2
I IC test pin - should be left open or kept at a low level
TEST3, TEST4
I IC test pin - should be left open or kept at a high level
64Hz
O 64Hz signal output pin for oscillation frequency adjustment
a1, a3 ~ b2, b4, c4
a4, d4, e4, g4
O Segment output pins for VFD
1Hz
Rev. 1.00
2 February 7, 2007
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