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![]() Microsemi Corporation |
![]() APT41M80B2
APT41M80L
800V, 41A, 0.24Ω Max
N-Channel MOSFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
A proprietary planar stripe design yields excellent reliability and manufacturability. Low
switching loss is achieved with low input capacitance and ultra low Crss "Miller" capaci-
tance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency. Reliability in flyback, boost, forward, and
other circuits is enhanced by the high avalanche energy capability.
www.DataSheet4U.com
TO-247
D3PAK
APT41M80B2
APT41M80L
D
Single die MOSFET
G
S
FEATURES
• Fast switching with low EMI/RFI
• Low RDS(on)
• Ultra low Crss for improved noise immunity
• Low gate charge
• Avalanche energy rated
• RoHS compliant
TYPICAL APPLICATIONS
• PFC and other boost converter
• Buck converter
• Two switch forward (asymmetrical bridge)
• Single switch forward
• Flyback
• Inverters
Absolute Maximum Ratings
Symbol Parameter
ID
Continuous Drain Current @ TC = 25°C
Continuous Drain Current @ TC = 100°C
IDM Pulsed Drain Current 1
VGS Gate-Source Voltage
EAS Single Pulse Avalanche Energy 2
IAR Avalanche Current, Repetitive or Non-Repetitive
Thermal and Mechanical Characteristics
Symbol Characteristic
PD
RθJC
Total Power Dissipation @ TC = 25°C
Junction to Case Thermal Resistance
RθCS Case to Sink Thermal Resistance, Flat, Greased Surface
TJ,TSTG Operating and Storage Junction Temperature Range
TL Soldering Temperature for 10 Seconds (1.6mm from case)
WT Package Weight
Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw
Microsemi Website - http://www.microsemi.com
Ratings
41
26
150
±30
1710
20
Unit
A
V
mJ
A
Min Typ Max Unit
1040 W
0.12
°C/W
0.11
-55 150
°C
300
0.22 oz
6.2 g
10 in·lbf
1.1 N·m
![]() Static Characteristics
TJ = 25°C unless otherwise specified
Symbol Parameter
Test Conditions
Min
VBR(DSS)
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250µA
800
∆VBR(DSS)/∆TJ Breakdown Voltage Temperature Coefficient
RDS(on)
Drain-Source On Resistance 3
Reference to 25°C, ID = 250µA
VGS = 10V, ID = 20A
VGS(th)
∆VGS(th)/∆TJ
Gate-Source Threshold Voltage
Threshold Voltage Temperature Coefficient
VGS = VDS, ID = 2.5mA
3
IDSS Zero Gate Voltage Drain Current
VDS = 800V
VGS = 0V
TJ = 25°C
TJ = 125°C
IGSS Gate-Source Leakage Current
VGS = ±30V
Dynamic Characteristics
Symbol
gfs
www.DataSheet4U.cCoCmrissss
Coss
Parameter
Forward Transconductance
Input Capacitance
Reverse Transfer Capacitance
Output Capacitance
TJ = 25°C unless otherwise specified
Test Conditions
Min
VDS = 50V, ID = 20A
VGS = 0V, VDS = 25V
f = 1MHz
Co(cr) 4
Co(er) 5
Effective Output Capacitance, Charge Related
Effective Output Capacitance, Energy Related
VGS = 0V, VDS = 0V to 533V
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Current Rise Time
Turn-Off Delay Time
Current Fall Time
VGS = 0 to 10V, ID = 20A,
VDS = 400V
Resistive Switching
VDD = 533V, ID = 20A
RG = 2.2Ω 6 , VGG = 15V
APT41M80B2_L
Typ Max Unit
V
0.87 V/°C
0.20 0.24
Ω
45V
-10 mV/°C
100
500
µA
±100 nA
Typ Max Unit
38 S
8070
140
805
380 pF
190
260
44 nC
135
46
65 ns
200
60
Source-Drain Diode Characteristics
Symbol Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode) 1
VSD Diode Forward Voltage
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
dv/dt
Peak Recovery dv/dt
Test Conditions
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
D
G
S
ISD = 20A, TJ = 25°C, VGS = 0V
ISD = 20A, VDD = 100V 3
diSD/dt = 100A/µs, TJ = 25°C
ISD ≤ 20A, di/dt ≤1000A/µs, VDD = 533V,
TJ = 125°C
Min
Typ
1000
14.7
Max
41
150
1.0
10
Unit
A
V
ns
µC
V/ns
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
2 Starting at TJ = 25°C, L = 8.55mH, RG = 2.2Ω, IAS = 20A.
3 Pulse test: Pulse Width < 380µs, duty cycle < 2%.
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -2.17E-7/VDS^2 + 2.63E-8/VDS + 3.74E-11.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
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