CYV270M0101EQ 반도체 회로 부품 판매점
Adaptive Video Cable Equalizer
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 Cypress Semiconductor |
CYV270M0101EQ
Adaptive Video Cable Equalizer (SOIC)
Features
• Adaptive Cable Equalization
• SMPTE 259M Compliant
• Supports DVB-ASI at 270 Mbps
• Multi-standard operation from 143 Mbps to 360 Mbps
• Cable Length Indicator for SD-SDI data rates
www.DataSheet•4UM.caoxmimum Cable Length Adjustment for SD-SDI data rates
• Carrier detect and Mute functionality for SD-SDI data rates
• Equalizer Bypass Mode
• Seamless connection with HOTLink II™ Family, HOTLink
(R)™ Receiver
• Equalizes up to 350m of Belden 1694A coaxial cable at 270
Mbps
• Low Power 160 mW @ 3.3V
• Single 3.3V supply
• 16-pin SOIC
• 0.18-µm CMOS technology
• Pb-free and RoHS compliant
• Pin-compatible to existing equalizer devices
Equalizer System Connection Diagram
Functional Description
The CYV270M0101EQ is an adaptive video cable equalizer
designed to equalize and restore signals received over 75Ω
coaxial cable. The equalizer is designed to meet SMPTE
259M data rates and is optimized for performance at 270
Mbps. The CYV270M0101EQ is optimized to equalize up to
350m of Belden 1694A coaxial cable at 270 Mbps. The
CYV270M0101EQ connects seamlessly to the HOTLink II
family of transceiver devices and HOTLink(R) receiver
devices.
The CYV270M0101EQ has DC restoration for compensation
of the DC content of the SMPTE pathological patterns. A cable
length indicator (CLI) provides an indication of the cable length
being equalized at SD-SDI data rates. The Maximum cable
length adjust (MCLADJ) sets the approximate maximum cable
length to be equalized. The CYV270M0101EQ’s differential
serial outputs (SDO, SDO) mute, when the approximate cable
length set by MCLADJ is reached. CD/MUTE is a bidirectional
pin that provides an indication of the signal being present at
the equalizer inputs. It also controls muting the outputs of the
equalizer.
Power consumption is typically 160 mW at 3.3V.
HOTLink IITM
Serializer
Cable
Driver
Serial Links
Copper Cable
Connections
CYV270M0101EQ
Multi-Rate
Cable
Equalizer
HOTLink IITM
Deserializer
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 001-06830 Rev. *A
Revised January 8, 2007
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Equalizer Block Diagram
CYV270M0101EQ
CLI
MCLADJ
www.DataSheet4U.com
CYV270M0101EQ Adaptive Video Cable Equalizer Block Diagram
CYV270M0101EQ Adaptive Video Cable Equalizer Block Diagram
Cable Length Analog
Indicator and Mute
Threshold Block
Carrier Detect and Mute
Control Block
DC Restore
CD / MUTE
BYPASS
SDI, SDI
Equalizer
Differential Output
SDO, SDO
Pin Configuration (Top View)
CLI
VCC
GND
SDI
SDI
GND
AGC+
AGC-
16-PIN SOIC Top View
16
2 15
3 14
4 13
CYV270M0101EQ
5 12
6 11
7 10
89
CD/MUTE
VCC
GND
SDO
SDO
GND
MCLADJ
BYPASS
Document #: 001-06830 Rev. *A
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제조업체: Cypress Semiconductor
( cypress )
CYV270M0101EQ data
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국내 전력반도체 판매점
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