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Alliance Semiconductor |
www.DataSheet4U.com
January 2005
ASM1232LP/LPS
rev 1.5
5V µP Power Supply Monitor and Reset Circuit
General Description
The ASM1232LP/LPS is a fully integrated microprocessor
supervisor. It can halt and restart a “hung-up” microprocessor,
restart a microprocessor after a power failure. It has a
watchdog timer and external reset override.
• Low-cost surface mount packages: 8-pin/16-pin SO, 8-pin
DIP and 8-pin Micro SO packages
• Wide operating temperature -40°C to +85°C (N suffixed
devices)
Applications
A precision temperature-compensated reference and
comparator circuits monitor the 5V, VCC input voltage status.
During power-up or when the VCC power supply falls outside
selectable tolerance limits, both RESET and RESET become
active. When VCC rises above the threshold voltage, the reset
signals remain active for an additional 250ms minimum,
allowing the power supply and system microprocessor to
stabilize. The trip point tolerance signal, TOL, selects the trip
level tolerance to be either 5% or 10%.
• Microprocessor Systems
• Computers
• Controllers
• Portable Equipment
• Intelligent Instuments
• Automotive Systems
Typical Operating Circuit
Each device has both a push-pull, active HIGH reset output
and an open drain active LOW reset output. A debounced
manual reset input, PBRST, activates the reset outputs for a
minimum period of 250ms.
There is a watchdog timer to stop and restart a microprocessor
that is “hung-up”. The watchdog timeouts periods are
selectable: 150ms, 610ms and 1200ms. If the ST input is not
strobed LOW before the time-out period expires, a reset is
generated.
ASM1232LP/LPS
ST
RESET
GND TD TOL
+5V
10kΩ
µP
I/O
RESET
Devices are available in 8-pin DIP, 16-pin SO and compact 8-
pin MicroSO packages.
Block Diagram
Key Features
• 5V supply monitor
• Selectable watchdog period
• Debounce manual push-button reset input
• Precision temperature-compensated voltage reference
and comparator.
• Power-up, power-down and brown out detection
• 250ms minimum reset time
• Active LOW open drain reset output and active HIGH
push-pull output
• Selectable trip point tolerance: 5% or 10%
VCC
TOL
PBRST
TD
ST
ASM1232LP/LPS
Tolerance Selection
Reference
VCC
40kΩ
Push Button
Debounce
Voltage Sense
Comparators
Watchdog Transition
Detector
+
-
Reset &
Watchdog Timer
RESET
RESET
GND
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice
January 2005
rev 1.5
Pin Configuration
DIP/SO/MicroSO
PBRST 1
8 VCC
TD 2
TOL 3
ASM1232LP 7
ASM1232LPS-2
ASM1232LPU 6
ST
RESET
GND 4
5 RESET
ASM1232LP/LPS
SO
NC 1
16 NC
PBRST 2
NC 3
15 VCC
14 NC
TD 4 ASM1232LPS 13 ST
NC 5
12 NC
TOL 6
11 RESET
NC 7
GND 8
10 NC
9 RESET
Pin Description
Pin #
8-Pin Package
1
2
3
4
5
6
7
8
-
Pin #
16-Pin Package
2
4
6
8
9
11
13
15
1,3,5,7,
10,12,14,16
Pin
Name
Function
PBRST
TD
TOL
GND
RESET
RESET
ST
VCC
Debounced manual pushbutton RESET input.
Watchdog time delay selection. (tTD = 150ms for TD = GND, tTD = 610ms
for TD=Open, and tTD = 1200ms for TD = VCC).
Selects 5% (TOL connected to GND) or 10% (TOL connected to VCC)
trip point tolerance.
Ground.
Active HIGH reset output. RESET is active:
1. If VCC falls below the reset voltage trip point.
2. If PBRST is LOW.
3. If ST is not strobed LOW before the timeout period set by TD expires.
4. During power-up.
Active LOW reset output. (See RESET).
Strobe input.
5V power.
NC No internal connection.
5V µP Power Supply Monitor and Reset Circuit
Notice: The information in this document is subject to change without notice
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