IDTCV110J 반도체 회로 부품 판매점
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
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 Integrated Device Technology |
www.DataSheet4U.com
IDTCV110J
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
COMMERCIALTEMPERATURERANGE
PROGRAMMABLE FLEXPC
CLOCK FOR P4 PROCESSOR
IDTCV110J
FEATURES:
• One high precision PLL for CPU, SSC, and N programming
• One high precision PLL for SRC/PCI/SATA, SSC, and N
programming
• One high precision PLL for 96MHz/48MHz
• Band-gap circuit for differential outputs
• Support spread spectrum modulation, down spread 0.5%
• Support SMBus block read/write, index read/write
• Selectable output strength for REF
• Allows for CPU frequency to change to a higher frequency for
maximum system computing power
• Available in SSOP package
DESCRIPTION:
IDTCV110J is a 56 pin clock device. The CPU output buffer is designed to
support up to 400MHz processor. This chip has three PLLs inside for CPU/
SRC/PCI, SATA, and 48MHz/DOT96 IO clocks. One dedicated PLL for Serial
ATA clock provides high accuracy frequency. This device also implements
Band-gap referenced IREF to reduce the impact of VDD variation on differential
outputs, which can provide more robust system performance.
Static PLL frequency divide error can be as low as 36 ppm, worse case 114
ppm, providing high accuracy output clock. Each CPU/SRC/PCI, SATA clock
has its own Spread Spectrum selection, which allows for isolated changes
instead of affecting other clock groups.
OUTPUTS:
• 2*0.7V current –mode differential CPU CLK pair
• 6*0.7V current –mode differential SRC CLK pair, one dedicated KEY SPECIFICATION:
for SATA
• CPU/SRC CLK cycle to cycle jitter < 85ps
• One CPU_ITP/SRC selectable CLK pair
• SATA CLK cycle to cycle jitter < 85ps
• 9*PCI, 3 free running, 33.3MHz
• PCI CLK cycle to cycle jitter < 250ps
• 1*96MHz,1*48MHz
• Static PLL frequency divide error < 114 ppm
• 1*REF
DataSheet•4USt.actoicmPLL frequency divide error for 48MHz < 5 ppm
FUNCTIONAL BLOCK DIAGRAM
DataShee
X1
X2
SDATA
SCLK
XTAL
Osc Amp
SM Bus
Controller
VTT_PWRGD#/PD
FSA.B.C
Control
Logic
PLL1
SSC
N Programmable
CPU CLK
Output Buffers
Stop Logic
IREF
ITP_EN
PLL2
SSC
N Programmable
SRC CLK
Output Buffer
Stop Logic
IREF
PLL3
48MHz/96MHz
Output BUffer
DataSheet4U.com
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
© 2004 Integrated Device Technology, Inc.
1
CPU[1:0]
CPU_ITP/SRC7
REF
SRC[6:1]
PCI[5:0], PCIF[2:0]
48MHz
DOT96
MAY 2004
DSC-6507/12
www.DataSheet4U.com
IDTCV110J
PROGRAMMABLEFLEXPCCLOCKFORP4PROCESSOR
COMMERCIALTEMPERATURERANGE
PIN CONFIGURATION
VDD_PCI
VSS_PCI
PCI3
PCI4
PCI5
VSS_PCI
VDD_PCI
PCIF0/ITP_EN
PCIF1
PCIF2
VDD48
USB48
VSS48
DOT96
DOT96#
FSB/TEST_MODE
VTT_PWRGD#/PD
et4U.com
FSA
SRC1
SRC1#
VDD_SRC
SRC2
SRC2#
SRC3
SRC3#
SRC4
SRC4#
VDD_SRC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Min Max Unit
56 PCI2
55 PCI1
54 PCI0
53 FSC/TEST_SEL
52 REF
VDDA 3.3V Core Supply Voltage
4.6 V
VDDIN
3.3V Logic Input Supply Voltage GND - 0.5
4.6
V
TSTG Storage Temperature
–65 +150 °C
TAMBIENT Ambient Operating Temperature
0
+70 °C
TCASE
Case Temperature
+115 °C
ESD Prot Input ESD Protection
2000
V
51 VSS_REF
Human Body Model
50 XTAL_IN
49 XTAL_OUT
48 VDD_REF
47 SDA
46 SCL
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
45 VSS_CPU
44 CPU0
43 CPU0#
42 VDD_CPU
41 CPU1
40 CPU1#
39 IREF
38 VSSA
37 VDDA
DataSheet4U.com
36 CPU2_ITP/SRC7
DataShee
35 CPU2_ITP#/SRC7#
34 VDD_SRC
33 SRC6
32 SRC6#
31 SRC5
30 SRC5#
29 VSS_SRC
SSOP
TOP VIEW
FREQUENCY SELECTION TABLE
FSC, B, A
CPU
SRC[7:1]
PCI
101 100 100
33.3
001 133 100
33.3
011 166 100
33.3
010 200 100
33.3
000 266 100
33.3
100 333 100
33.3
110 400 100
33.3
DataSheet4U.co11m1
Reserve
100
33.3
USB
48
48
48
48
48
48
48
48
2
DOT
96
96
96
96
96
96
96
96
REF
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
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제조업체: Integrated Device Technology
( idt )
IDTCV110J data
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PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR - Integrated Device Technology
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