XC3S200 반도체 회로 부품 판매점
(XC3S50 - XC3S5000) Spartan-3 FPGA Family
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 Xilinx |
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m Spartan-3 FPGA Family:R
t4U.co Complete Data SheetDS099 August 19, 2005
0 0 Product Specification
eThis document includes all four modules of the Spartan™-3 FPGA data sheet.
SheModule 1:
taIntroduction and Ordering Information
aDS099-1 (v1.5) August 19, 2005
.D8 pages
w• Introduction
w• Features
w• Architectural Overview
m• Array Sizes and Resources
o• User I/O Chart
• Ordering Information
.cModule 2:
UFunctional Description
DS099-2 (v1.4) August 19, 2005
t442 pages
• Input/Output Blocks (IOBs)
e- IOB Overview
e- SelectIO™ I/O Standards
• Configurable Logic Blocks (CLBs)
h• Block RAM
S• Dedicated Multipliers
• Digital Clock Manager (DCM)
ta• Clock Network
• Configuration
Module 3:
DC and Switching Characteristics
DS099-3 (v1.6) August 19, 2005
44 pages
• DC Electrical Characteristics
- Absolute Maximum Ratings
- Supply Voltage Specifications
- Recommended Operating Conditions
- DC Characteristics
• Switching Characteristics
- I/O Timing
- Internal Logic Timing
- DCM Timing
- Configuration and JTAG Timing
Module 4:
Pinout Descriptions
DS099-4 (v1.7) August 19, 2005
110 pages
• Pin Descriptions
- Pin Behavior During Configuration
• Package Overview
• Pinout Tables
- Footprints
.DaIMPORTANT NOTE: The Spartan-3 FPGA data sheet is created and published in separate modules. This complete version
is provided for easy downloading and searching of the complete document. Page, figure, and table numbers begin at 1 for
each module, and each module has its own Revision History at the end. Use the PDF "Bookmarks" for easy navigation in
wthis volume.
ww .DataSheet4U.com© 2005 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
wAll other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
wwDS099 August 19, 2005
www.xilinx.com
Product Specification
R
DS099-1 (v1.5) August 19, 2005
08 Spartan-3 FPGA Family:
Introduction and Ordering
Information
0 0 Product Specification
Introduction
The Spartan™-3 family of Field-Programmable Gate Arrays
is specifically designed to meet the needs of high volume,
cost-sensitive consumer electronic applications. The
eight-member family offers densities ranging from 50,000 to
five million system gates, as shown in Table 1.
The Spartan-3 family builds on the success of the earlier
Spartan-IIE family by increasing the amount of logic
resources, the capacity of internal RAM, the total number of
I/Os, and the overall level of performance as well as by
improving clock management functions. Numerous
enhancements derive from state-of-the-art Virtex™-II tech-
nology. These Spartan-3 enhancements, combined with
advanced process technology, deliver more functionality
and bandwidth per dollar than was previously possible, set-
ting new standards in the programmable logic industry.
Because of their exceptionally low cost, Spartan-3 FPGAs
are ideally suited to a wide range of consumer electronics
applications, including broadband access, home network-
ing, display/projection and digital television equipment.
The Spartan-3 family is a superior alternative to mask pro-
grammed ASICs. FPGAs avoid the high initial cost, the
lengthy development cycles, and the inherent inflexibility of
conventional ASICs. Also, FPGA programmability permits
design upgrades in the field with no hardware replacement
necessary, an impossibility with ASICs.
Features
• SelectIO™ signaling
- Up to 784 I/O pins
- 622 Mb/s data transfer rate per I/O
- 18 single-ended signal standards
- 8 differential I/O standards including LVDS, RSDS
- Termination by Digitally Controlled Impedance
- Signal swing ranging from 1.14V to 3.45V
- Double Data Rate (DDR) support
- DDR, DDR2 SDRAM support up to 333 Mbps
• Logic resources
- Abundant logic cells with shift register capability
- Wide, fast multiplexers
- Fast look-ahead carry logic
- Dedicated 18 x 18 multipliers
- JTAG logic compatible with IEEE 1149.1/1532
• SelectRAM™ hierarchical memory
- Up to 1,872 Kbits of total block RAM
- Up to 520 Kbits of total distributed RAM
• Digital Clock Manager (up to four DCMs)
- Clock skew elimination
- Frequency synthesis
- High resolution phase shifting
• Eight global clock lines and abundant routing
• Fully supported by Xilinx ISE development system
- Synthesis, mapping, placement and routing
• MicroBlaze™ processor, PCI, and other cores
• Pb-free packaging options
• Low-cost, high-performance logic solution for
high-volume, consumer-oriented applications
- Densities up to 74,880 logic cells
• Low-power Spartan-3L Family and Automotive
Spartan-3 XA Family variants
Table 1: Summary of Spartan-3 FPGA Attributes
Device
XC3S502
XC3S2002
XC3S4002
XC3S10002, 3
XC3S15003
System
Gates
50K
200K
400K
1M
1.5M
Equivalent
Logic
Cells1
1,728
4,320
8,064
17,280
29,952
CLB Array
(One CLB = Four Slices)
Rows Columns Total CLBs
16 12
192
24 20
480
32 28
896
48 40
1,920
64 52
3,328
Distributed
RAM Bits
(K=1024)
12K
30K
56K
120K
208K
Block RAM
Bits
(K=1024)
72K
216K
288K
432K
576K
Dedicated
Multipliers
4
12
16
24
32
DCMs
2
4
4
4
4
Maximum
User I/O
124
173
264
391
487
Maximum
Differential
I/O Pairs
56
76
116
175
221
XC3S2000
XC3S40003
2M
4M
46,080
62,208
80
96
64
72
5,120
6,912
320K
432K
720K
1,728K
40
96
4 565
4 712
270
312
XC3S5000
5M
74,880 104
80
8,320
520K
1,872K
104
4 784
344
Notes:
1. Logic Cell = 4-input Look-Up Table (LUT) plus a ‘D’ flip-flop. "Equivalent Logic Cells" equals "Total CLBs" x 8 Logic Cells/CLB x 1.125 effectiveness.
2. These devices are available in Xilinx Automotive versions as described in DS314: Spartan-3 Automotive XA FPGA Family.
3. These devices are available in lower static power versions as described in DS313: Spartan-3L Low Power FPGA Family.
© 2004, 2005 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS099-1 (v1.5) August 19, 2005
Product Specification
www.xilinx.com
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