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MBM29QM12DH 반도체 회로 부품 판매점

128M (8M x 16) BIT FLASH MEMORY



Fujitsu Media Devices 로고
Fujitsu Media Devices
MBM29QM12DH 데이터시트, 핀배열, 회로
FUJITSU SEMICONDUCTOR
DATA SHEET
PAGE MODE FLASH MEMORY
CMOS
128M (8M× 16) BIT
DS05-20909-1E
MBM29QM12DH-60
s DESCRIPTION
The MBM29QM12DH is 128 M-bit, 3.0 V-only Page mode and dual operation Flash memory organized as 8M
words of 16 bits each. The device is offered in 56-pin TSOP and 80-ball FBGA package. This device is designed
to be programmed in-system with the standard system 3.0 V Vcc supply. 12.0 V Vpp and 5.0 V Vcc are not
required for write or erase operations. The device can also be reprogrammed in standard EPROM programmers.
(Continued)
s PRODUCT LINE UP
Part No.
VCC
=
3.0
V
+0.6
–0.3
V
V
Max Random Address Access Time (ns)
Max Page Address Access Time (ns)
Max CE Access Time (ns)
Max OE Access Time (ns)
MBM29QM12DH60
VCCQ = 2.7 V to 3.6 V
VCCQ = 1.65 V to 1.95 V
60 70
20 30
60 70
20 30
s PACKAGES
56-pin plastic TSOP (1)
80-pin plastic FBGA
(FPT-56P-M01)
(BGA-80P-M04)


MBM29QM12DH 데이터시트, 핀배열, 회로
MBM29QM12DH-60
(Continued)
The device provides truly high performance non-volatile Flash memory solution. The device offers fast page
access times of 20 ns with random access times of 60 ns, allowing operation of high-speed microprocessors
without wait states. To eliminate bus contention the device has separate chip enable (CE), write enable (WE),
and output enable (OE) controls. The page size is 8 words.
The dual operation function provides simultaneous operation by dividing the memory space into four banks. The
device can improve overall system performance by allowing a host system to program or erase in one bank,
then immediately and simultaneously read from the other bank with zero latency. This releases the system from
waiting for the completion of program or erase operations.
The device is command set compatible with JEDEC standard E2PROMs. Commands are written to the command
register using standard microprocessor write timings. Register contents serve as input to an internal state-
machine which controls the erase and programming circuitry. Write cycles also internally latch addresses and
data needed for the programming and erase operations. Reading data out of the device is similar to reading
from 5.0 V and 12.0 V Flash or EPROM devices.
The device is programmed by executing the program command sequence. This will invoke the Embedded
Program Algorithm which is an internal algorithm that automatically times the program pulse widths and verifies
proper cell margins. Typically, each 32K words sector can be programmed and verified in about 0.3 seconds.
Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase
Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed
before executing the erase operation. During erase, the device automatically times the erase pulse widths and
verifies proper cell margins.
Any individual sector is typically erased and verified in 0.5 second. (If already preprogrammed.)
The device also features a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. The device is erased when shipped from the factory.
The device features single 3.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low VCC detector automatically
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ7,
by the Toggle Bit feature on DQ6, output pin. Once the end of a program or erase cycle has been completed,
the device internally resets to the read mode.
Fujitsu’s Flash technology combines years of Flash memory manufacturing experience to produce the highest
levels of quality, reliability, and cost effectiveness. The device memory electrically erases all bits within a sector
simultaneously via Fowler-Nordhiem tunneling. The words are programmed one word at a time using the EPROM
programming mechanism of hot electron injection.
2




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MBM29QM12DH

128M (8M x 16) BIT FLASH MEMORY - Fujitsu Media Devices



MBM29QM12DH-60

128M (8M x 16) BIT FLASH MEMORY - Fujitsu