MCM6726D 반도체 회로 부품 판매점
128K x 8 Bit Fast Static Random Access Memory
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 Motorola Semiconductors |
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
128K x 8 Bit Fast Static Random
Access Memory
The MCM6726D is a 1,048,576 bit static random access memory organized
as 131,072 words of 8 bits. Static design eliminates the need for external clocks
or timing strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
This device meets JEDEC standards for functionality and revolutionary pinout,
and is available in a 400 mil plastic small–outline J–leaded package.
• Single 5 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• All Inputs and Outputs Are TTL Compatible
• Three State Outputs
• Fast Access Times: 8, 10, 12 ns
• Center Power and I/O Pins for Reduced Noise
BLOCK DIAGRAM
A
A VCC
VSS
A
A MEMORY
A
ROW
MATRIX
DECODER
512 ROWS x 256 x 8
A COLUMNS
A
A
A
DQ COLUMN I/O
INPUT
DATA
CONTROL
COLUMN DECODER
DQ
A AA A AAA A
E
W
G
Order this document
by MCM6726D/D
MCM6726D
WJ PACKAGE
400 MIL SOJ
CASE 857A–02
PIN ASSIGNMENT
A1
A2
A3
A4
E5
DQ 6
DQ 7
VCC 8
VSS 9
DQ 10
DQ 11
W 12
A 13
A 14
A 15
A 16
32 A
31 A
30 A
29 A
28 G
27 DQ
26 DQ
25 VSS
24 VCC
23 DQ
22 DQ
21 A
20 A
19 A
18 A
17 A
PIN NAMES
A . . . . . . . . . . . . . . . . . . . . Address Input
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
W . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
DQ . . . . . . . . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
10/9/96
M© OMoTtoOroRla,OInLc.A19F96AST SRAM
MCM6726D
1
TRUTH TABLE (X = Don’t Care)
E GW
Mode
H X X Not Selected
L H H Output Disabled
L LH
Read
LXL
Write
VCC Current
ISB1, ISB2
ICCA
ICCA
ICCA
Output
High–Z
High–Z
Dout
High–Z
Cycle
—
—
Read Cycle
Write Cycle
ABSOLUTE MAXIMUM RATINGS (See Note)
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
– 0.5 to + 7.0
V
Voltage Relative to VSS for Any Pin Except
VCC
Vin, Vout – 0.5 to VCC + 0.5
V
Output Current
Iout ± 30 mA
Power Dissipation
PD 1.2 W
Temperature Under Bias
Tbias
– 10 to + 85
°C
Operating Temperature
TA
0 to + 70
°C
Storage Temperature — Plastic
Tstg
– 55 to + 125
°C
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid appli-
cation of any voltage higher than maximum
rated voltages to these high–impedance cir-
cuits.
This BiCMOS memory circuit has been de-
signed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear feet
per minute is maintained.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V ± 10%, TA = 0 to 70°C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Supply Voltage (Operating Voltage Range)
Input High Voltage
VCC
VIH
4.5
2.2
Input Low Voltage
VIL – 0.5*
* VIL (min) = –0.5 V dc; VIL (min) = –2.0 V ac (pulse width ≤ 2.0 ns) for I ≤ 20.0 mA.
** VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2 V ac (pulse width ≤ 2.0 ns) for I ≤ 20.0 mA.
DC CHARACTERISTICS
Parameter
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Output Leakage Current (E = VIH, Vout = 0 to VCC)
Output Low Voltage (IOL = + 8.0 mA)
Output High Voltage (IOH = – 4.0 mA)
Symbol
Ilkg(I)
Ilkg(O)
VOL
VOH
Typ Max Unit
5.0 5.5 V
— VCC + 0.3** V
— 0.8 V
Min Max Unit
—
± 1.0
µA
—
± 1.0
µA
— 0.4 V
2.4 — V
POWER SUPPLY CURRENTS
Parameter
Symbol 6726D–8 6726D–10 6726D–12 Unit
AC Active Supply Current (Iout = 0 mA) (VCC = max, f = fmax)
ICCA
195
175
165 mA
Active Quiescent Current (E = VIL, VCC = max, f = 0 MHz)
ICC2
100
100
100 mA
AC Standby Current (E = VIH, VCC = max, f = fmax)
ISB1
60
60
60 mA
CMOS Standby Current (VCC = max, f = 0 MHz, E ≥ VCC – 0.2 V,
ISB2
20
20
20 mA
Vin ≤ VSS + 0.2 V, or ≥ VCC – 0.2 V)
NOTES:
1. Reference AC Operating Conditions and Characteristics for input and timing (VIH/VIL, tr/tf, pulse level 0 to 3.0 V, VIH = 3.0 V).
2. All addresses transition simultaneously low (LSB) and then high (MSB).
3. Data states are all zero.
Notes
1, 2, 3
1, 2, 3
MCM6726D
2
MOTOROLA FAST SRAM
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