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Motorola Semiconductors |
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MCM6708A/D
64K x 4 Bit Static RAM
The MCM6708A is a 262,144 bit static random access memory organized as
65,536 words of 4 bits, fabricated using high–performance silicon–gate BiCMOS
technology. Static design eliminates the need for external clocks or timing
strobes.
The MCM6708A is available in a 300 mil, 24 lead plastic surface–mount SOJ
package.
• Single 5 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• All Inputs and Outputs are TTL Compatible
• Three State Outputs
• Fast Access Times:
MCM6708A–8 = 8 ns
MCM6708A–10 = 10 ns
MCM6708A–12 = 12 ns
BLOCK DIAGRAM
A
A
A
A
A
ROW
DECODER
MEMORY MATRIX
256 ROWS x 256 x 4
COLUMNS
A
A
A
DQ0
•••
•••
INPUT
DATA
CONTROL
COLUMN I/O
COLUMN DECODER
•••
DQ3
AA A A AAAA
E
W
MCM6708A
J PACKAGE
300 MIL SOJ
CASE 810A–02
PIN ASSIGNMENT
A0 1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
A9 10
E 11
VSS 12
24 VCC
23 A15
22 A14
21 A13
20 A12
19 A11
18 A10
17 DQ0
16 DQ1
15 DQ2
14 DQ3
13 W
PIN NAMES
A0 – A15 . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . Write Enable
E . . . . . . . . . . . . . . . . . . . . . Chip Enable
DQ0 – DQ3 . . . . . . . Data Input/Output
VCC . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . No Connection
REV 5
5/95
M© OMoTtoOroRla,OInLc.A19F95AST SRAM
MCM6708A
2–1
TRUTH TABLE (X = Don’t Care)
E GW
Mode
H X X Not Selected
L HH
Read
L LH
Read
LXL
Write
Output
High–Z
High–Z
Dout
Din
Cycle
—
—
Read Cycle
Write Cycle
ABSOLUTE MAXIMUM RATINGS (See Note)
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
– 0.5 to + 7.0
V
Voltage Relative to VSS for Any Pin
Except VCC
Vin, Vout – 0.5 to VCC + 0.5 V
Output Current (per I/O)
Iout ± 30 mA
Power Dissipation
PD 2.0 W
Temperature Under Bias
Tbias
– 10 to + 85
°C
Operating Temperature
TA
0 to + 70
°C
Storage Temperature — Plastic
Tstg
– 55 to + 125
°C
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid appli-
cation of any voltage higher than maximum
rated voltages to this high–impedance circuit.
This BiCMOS memory circuit has been de-
signed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear feet
per minute is maintained.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V ± 10%, TA = 0 to 70°C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Supply Voltage (Operating Voltage Range)
Input High Voltage
VCC
VIH
4.5
2.2
Input Low Voltage
VIL – 0.5**
* VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width ≤ 2.0 ns) or I ≤ 30.0 mA.
** VIL (min) = – 0.5 V dc @ 30.0 mA; VIL (min) = – 2.0 V ac (pulse width ≤ 2.0 ns) or I ≤ 30.0 mA.
Typ Max Unit
5.0 5.5 V
— VCC + 0.3* V
— 0.8 V
DC CHARACTERISTICS
Parameter
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Output Leakage Current (E = VIH, Vout = 0 to VCC)
Output High Voltage (IOH = – 4.0 mA)
Output Low Voltage (IOL = 8.0 mA)
Symbol
Ilkg(I)
Ilkg(O)
VOH
VOL
Min
—
—
2.4
—
Max
± 1.0
± 1.0
—
0.4
Unit
µA
µA
V
V
POWER SUPPLY CURRENTS
Parameter
Symbol MCM6708A–8 MCM6708A–10 MCM6708A–12 Unit
AC Active Supply Current (Iout = 0 mA, VCC = max,
f = fmax)
ICCA
185
175
165 mA
AC Standby Current (E = VIH, VCC = max, f = fmax)
ISB1
120
110
105 mA
CMOS Standby Current (VCC = max, f = 0 MHz,
E ≥ VCC – 0.2 V, Vin ≤ VSS, or ≥ VCC – 0.2 V)
ISB2
50
50
50 mA
NOTES:
1. Reference AC Operating Conditions and Characteristics for input and timing (VIH/VIL, tr/tf, pulse level 0 to 3.0 V, VIH = 3.0 V).
2. All addresses transition simultaneously low (LSB) and then high (MSB).
3. Data states are all zero.
Notes
1, 2, 3
1, 2, 3
MCM6708A
2–2
MOTOROLA FAST SRAM
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