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MC12034BD 반도체 회로 부품 판매점

MECL PLL COMPONENTS 32/33 / 64/65 DUAL MODULUS PRESCALER



Motorola Semiconductors 로고
Motorola Semiconductors
MC12034BD 데이터시트, 핀배열, 회로
Order this document by MC12034A/D
2.0GHz Dual Modulus Prescaler
MC12034A
MC12034B
The MC12034A can be used with CMOS synthesizers requiring positive
edges to trigger internal counters such as Motorola’s MC145xxx series in a
PLL to provide tuning signals up to 2.0 GHz in programmable frequency
steps.
The MC12034B can be used with CMOS synthesizers requiring negative
edges to trigger internal counters such as Fujitsu’s MB87001.
A Divide Ratio Control (SW) permits selection of a 32/33 or 64/65 divide
ratio as desired.
The Modulus Control (MC) selects the proper divide number after SW has
been biased to select the desired divide ratio.
2.0 GHz Toggle Frequency
Supply Voltage 4.5 to 5.5 V
MC12034A for Positive Edge Triggered Synthesizers
12mA Maximum, –40 to 85°C, VCC = 5.5 Vdc
Modulus Control Input is Compatible with Standard CMOS and TTL
Low–Power 8.5 mA Typical
FUNCTIONAL TABLE
SW MC
Divide Ratio
HH
32
HL
33
LH
64
LL
65
NOTES: 1. SW: H = VCC, L = Open. A logic L can also be applied by grounding this pin,
but this is not recommended due to increased power consumption.
2. MC: H = 2.0 V to VCC, L = GND to 0.8 V.
Design Criteria
Internal Gate Count *
Internal Gate Propagation Delay
Internal Gate Power Dissipation
Speed Power Product
NOTE: *Equivalent to a two–input NAND gate.
Value
67
200
0.75
0.15
Unit
ea
ps
mW
pJ
MAXIMUM RATINGS
Characteristic
Symbol
Range
Unit
Power Supply Voltage, Pin 2
Operating Temperature Range
Storage Temperature Range
Modulus Control Input, Pin 6
VCC
TA
Tstg
MC
–0.5 to +7.0
–40 to +85
–65 to +150
–0.5 to +6.5
Vdc
°C
°C
Vdc
NOTES: 1. ESD data available upon request.
2. This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this high
impedance circuit. For proper operation, Vin and Vout should be constrained
to the range GND (Vin or Vout) VCC.
MECL PLL COMPONENTS
÷32/33, ÷64/65
DUAL MODULUS PRESCALER
SEMICONDUCTOR
TECHNICAL DATA
8
1
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
8
1
P SUFFIX
PLASTIC PACKAGE
CASE 626
PIN CONNECTIONS
IN 1
VCC 2
SW 3
OUT 4
8 IN
7 NC
6 MC
5 Gnd
(Top View)
ORDERING INFORMATION
Device
Operating
Temp Range
Package
MC12034AD
SO–8
MC12034AP
TA = –40° to +85°C
MC12034BD
Plastic
SO–8
MC120348BP
Plastic
© Motorola, Inc. 1997
Rev 3


MC12034BD 데이터시트, 핀배열, 회로
MC12034A MC12034B
ELECTRICAL CHARACTERISTICS (VCC = 4.5 to 5.5 Vdc, TA = –40 to 85°C, unless otherwise noted.)
Characteristic
Symbol Min Typ
Toggle Frequency (Sine Wave)
ft 0.5 2.4
Supply Current Output Unloaded (Pin 2)
ICC – 8.5
Modulus Control Input High (MC)
VIH1 2.0 –
Modulus Control Input Low (MC)
VIL1 – –
Divide Ratio Control Input High (SW)
VIH2
VCC
VCC
Divide Ratio Control Input Low (SW)
VIL2
OPEN
OPEN
Output Voltage Swing (CL = 12 pF, RL = 1.1 k)
Vout
1.0 1.6
Modulus Setup Time MC to Out
tSET
– 8.0
Input Voltage Sensitivity 500–2000 MHz
Output Current (CL = 12 pF, RL = 1.1 k)
Vin 100 –
IO – –
Max
2.0
12
VCC
0.8
VCC
OPEN
10.0
1500
3.5
Unit
GHz
mA
V
V
Vdc
Vpp
ns
mVpp
mA
Figure 1. Logic Diagram (MC12034A)
DQ
DQ
DQ
ABC
In
C QB
C QB
C
QB
M
In
MC
DQ
D
C QB
D QB
E
CQ
DQ
F
C QB
D QB
G
CQ
SW
D QB
H
C SQ
Figure 2. Modulus Setup Time
PROP. DELAY
MC SETUP
IN
OUT
MC
MC RELEASE
Modulus setup time MC to out is the MC
Out setup or MC release plus the prop. delay.
Figure 3. Typical Output Waveform
500 m
20 ns
2 MOTOROLA RF/IF DEVICE DATA




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