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ON Semiconductor |
MC10H180
Dual 2-Bit Adder/Subtractor
The MC10H180 is a high–speed, low–power, general–purpose
adder/ subtractor. It is designed to be used in special purpose
adders/subtractors or in high–speed multiplier arrays.
Inputs for each adder are Carry–in, Operand A, and Operand B;
outputs are Sum, Sum and Carry–out. The common select inputs serve
as a control line to Invert A for subtract, and a control line to Invert B.
• Propagation Delay, 1.8 ns Typical, Operand and Select to Output
• Power Dissipation, 360 mW Typicalh180
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
LOGIC DIAGRAM
7
SELA S0
15
9
SELB S0
2
5 AO
6 BO
4
CIN COUT
3
SELA S1
SELB S1
14
1
11 A1
10 B1
12
CIN COUT
13
VCC = PIN 16
VEE = PIN 8
POSITIVE LOGIC ONLY
A’ = A SELA = A SELA
B’ = B SELB = B SELB
S = CIN (A’ B’ + A’ B’) +
CIN(A’ B’ + A’ B’)
COUT = CINA’ + CINB’ + A’ B’
DIP PIN ASSIGNMENT
S1 1 16 VCC
S0 2
15 S0
COUT
3
14 S1
CIN 4
A0 5
B0 6
13 COUT
12 CIN
11 A1
SELA
VEE
7
8
10 B1
9 SELB
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
MARKING
DIAGRAMS
16
MC10H180L
AWLYYWW
1
16
MC10H180P
AWLYYWW
1
1
10H180
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC10H180L
CDIP–16
25 Units/Rail
MC10H180P
PDIP–16
25 Units/Rail
MC10H180FN PLCC–20
46 Units/Rail
© Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 6
1
Publication Order Number:
MC10H180/D
MC10H180
MAXIMUM RATINGS
Symbol
Characteristic
Rating
Unit
VEE
VI
Iout
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current – Continuous
– Surge
–8.0 to 0
0 to VEE
50
100
Vdc
Vdc
mA
TA Operating Temperature Range
Tstg Storage Temperature Range – Plastic
– Ceramic
0 to +75
–55 to +150
–55 to +165
°C
°C
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note 1.)
0°
25°
75°
Symbol
Characteristic
Min Max Min Max Min
Max Unit
IE Power Supply Current
IinH Input Current High
Pins 4, 12
Pins 7, 9
Pins 5, 6, 10, 11
– 95 – 86 –
– 665 – 417 –
– 515 – 320 –
– 410 – 255 –
95 mA
µA
417
320
255
IinL Input Current Low
VOH
High Output Voltage
VOL
Low Output Voltage
VIH High Input Voltage (1)
VIL Low Input Voltage (1)
AC PARAMETERS
0.5
–1.02
–1.95
–1.17
–1.95
–
–0.84
–1.63
–0.84
–1.48
0.5
–0.98
–1.95
–1.13
–1.95
–
–0.81
–1.63
–0.81
–1.48
0.3
–0.92
–1.95
–1.07
–1.95
–
–0.735
–1.60
–0.735
–1.45
µA
Vdc
Vdc
Vdc
Vdc
tpd Propagation Delay
Operand to Output
Select to Output
Carry–in to Output
ns
0.6 2.4 0.7 2.5 0.8
2.8
0.6 2.2 0.7 2.3 0.8
2.6
0.4 1.6 0.4 1.7 0.4
1.8
tr Rise Time
0.5 2.0 0.5 2.1 0.5 2.2 ns
tf Fall Time
0.5 2.0 0.5 2.1 0.5 2.2 ns
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Ifpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts.
FUNCTION SELECT TABLE
SelA
H
H
L
L
SelB
Function
H S = A plus B
L S = A minus B
H S = B minus A
L S = 0 minus A minus B
TRUTH TABLE
INPUTS
FUNCTION
SelA SelB A0 B0 Cin S0 S0 Cout
ADD
H H LL L LH L
H H LL H HL L
H H LH L HL L
H H LH H LH H
H H HL L HL L
H H HL H LH H
H H HH L LH H
H H HH H HL H
SUBTRACT
H
H
H
H
H
H
H
H
L LL L HL L
L LL H LH H
L LH L LH L
L LH H HL L
L HL L LH H
L HL H HL H
L HH L HL L
L HH H LH H
INPUTS
FUNCTION
SelA SelB A0 B0 Cin S0 S0 Cout
REVERSE
SUBTRACT
L
L
L
L
L
L
L
L
H LL L HL L
H LL H LH H
H LH L LH H
H LH H HL H
H HL L LH L
H HL H HL L
H HH L HL L
H HH H LH H
L L LL L LH H
L L LL H HL H
L L LH L HL L
L L LH H LH H
L L HL L HL L
L L HL H LH H
L L HH L LH L
L L HH H HL L
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