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Siemens |
1M x 4-Bit Dynamic RAM
(Hyper Page Mode (EDO) version)
HYB 514405BJ/BJL-50/-60/-70
Preliminary Information
• 1 048 576 words by 4-bit organization
• 0 to 70 ˚C operating temperature
• Hyper Page Mode - EDO
• Performance:
tRAC RAS access time
tCAC CAS access time
tAA Access time from address
tRC Read/Write cycle time
tHPC Hyper page mode (EDO)
cycle time
-50 -60 -70
50 60 70 ns
13 15 20 ns
25 30 35 ns
89 104 124 ns
20 25 30 ns
• Single + 5 V (± 10 %) supply
• Low power dissipation
max. 660 mW active (-50 version)
max. 605 mW active (-60 version)
max. 550 mW active (-70 version)
• Standby power dissipation:
11 mW max.standby (TTL)
5.5 mW max.standby (CMOS)
1.1 mW max.standby (CMOS) for Low Power Version
• Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh,
hidden refresh and test mode capability
• All inputs and outputs TTL-compatible
• 1024 refresh cycles / 16 ms
• 1024 refresh cycles / 128 ms for Low Power Version
• Plastic Packages: P-SOJ-26/20-5 with 300 mil width
Semiconductor Group
1
5.96
HYB 514405BJ/BLJ-50/-60/-70
1M x 4 EDO - DRAM
The HYB 514405BJ is the new generation dynamic RAM organized as 1 048 576 words by 4-bit.
The HYB 514405BJ utilizes CMOS silicon gate process as well as advances circuit techniques to
provide wide operation margins, both internally and for the system user. Multiplexed address inputs
permit the HYB 514405BJ to be packed in a standard plastic P-SOJ-26/20 package. This package
size provides high system bit densities and is compatible with commonly used automatic testing and
insertion equipment. System oriented feature include single + 5 V (± 10 %) power supply, direct
interfacing with high performance logic device families.
Ordering Information
Type
HYB 514405BJ-50
HYB 514405BJ-60
HYB 514405BJ-70
HYB 514405BJL-50
HYB 514405BJL-60
HYB 514405BJL-70
Ordering Code
Q67100-Q2116
Q67100-Q2118
Q67100-Q2120
on request
on request
on request
Package
P-SOJ-26/20-5
P-SOJ-26/20-5
P-SOJ-26/20-5
P-SOJ-26/20-5
P-SOJ-26/20-5
P-SOJ-26/20-5
Descriptions
EDO-DRAM
(access time 50 ns)
EDO-DRAM
(access time 60 ns)
EDO-DRAM
(access time 70 ns)
Low Power EDO-DRAM
(access time 50 ns)
Low Power EDO-DRAM
(access time 60 ns)
Low Power EDO-DRAM
(access time 70 ns)
Semiconductor Group
2
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