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Cypress Semiconductor |
W183
Full Feature Peak Reducing EMI Solution
Features
• Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal at the out-
put
• Selectable output frequency range
• Single 1.25%, 3.75% down or center spread output
• Integrated loop filter components
• Operates with a 3.3 or 5V supply
• Low power CMOS design
• Available in 14-pin SOIC (Small Outline Integrated
Circuit)
Key Specifications
Supply Voltages: ........................................... VDD = 3.3V±5%
or VDD = 5V±10%
Frequency Range: ............................ 28 MHz ≤ Fin ≤ 75 MHz
Crystal Reference Range:................. 28 MHz ≤ Fin ≤ 40 MHz
Cycle to Cycle Jitter: ....................................... 300 ps (max.)
Selectable Spread Percentage: ....................1.25% or 3.75%
Output Duty Cycle: ............................... 40/60% (worst case)
Output Rise and Fall Time: .................................. 5 ns (max.)
Simplified Block Diagram
3.3V or 5.0V
Table 1. Modulation Width Selection
SS%
0
1
W183
Output
Fin ≥ Fout ≥ Fin –
1.25%
Fin ≥ Fout ≥ Fin –
3.75%
W183-5
Output
Fin + 0.625% ≥ Fin≥
– 0.625%
Fin + 1.875% ≥ Fin≥
–1.875%
Table 2. Frequency Range Selection
FS2 FS1
00
01
10
11
Frequency Range
28 MHz ≤ FIN ≤ 38 MHz
38 MHz ≤ FIN ≤ 48 MHz
46 MHz ≤ FIN ≤ 60 MHz
58 MHz ≤ FIN ≤ 75 MHz
Pin Configuration
SOIC
XTAL
Input
40 MHz
Max
X1
X2
W183
Spread Spectrum
Output
(EMI suppressed)
FS2
CLKIN or X1
NC or X2
GND
GND
SS%
FS1
1
2
3
4
5
6
7
14 REFOUT
13 OE#
12 SSON#
11 Reset
10 VDD
9 VDD
8 CLKOUT
3.3V or 5.0V
Oscillator or
Reference Input
W183
Spread Spectrum
Output
(EMI suppressed)
PREMIS is a trademark of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
July 25, 2000, rev.*B
W183
Pin Definitions
Pin Name
CLKOUT
REFOUT
Pin No.
8
14
CLKIN or X1
2
NC or X2
SSON#
3
12
SS%
6
OE#
13
Reset
11
FS1:2
VDD
GND
7, 1
9, 10
4, 5
Pin
Type
O
O
I
I
I
I
I
I
I
P
G
Pin Description
Output Modulated Frequency: Frequency modulated copy of the input clock
(SSON# asserted).
Non-Modulated Output: This pin provides a copy of the reference frequency.
This output will not have the Spread Spectrum feature regardless of the state
of logic input SSON#.
Crystal Connection or External Reference Frequency Input: This pin has
dual functions. It may either be connected to an external crystal, or to an
external reference clock.
Crystal Connection: Input connection for an external crystal. If using an ex-
ternal reference, this pin must be left unconnected.
Spread Spectrum Control (Active LOW): Asserting this signal (active LOW)
turns the internal modulation waveform on. This pin has an internal pull-down
resistor.
Modulation Width Selection: When Spread Spectrum feature is turned on,
this pin is used to select the amount of variation and peak EMI reduction that
is desired on the output signal. This pin has an internal pull-up resistor.
Output Enable (Active LOW): When this pin is held HIGH, the output buffers
are placed in a high-impedance mode. This pin has an internal pull-down re-
sistor.
ModulationProfile Restart: A rising edge on this input restarts the modulation
pattern at the beginning of its defined path. This pin has an internal pull-down
resistor.
Frequency Selection Bits: These pins select the frequency range of opera-
tion. Refer to Table 2. These pins have internal pull-up resistors.
Power Connection: Connected to 3.3V or 5V power supply.
Ground Connection: Connect all ground pins to the common ground plane.
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