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NXP Semiconductors |
INTEGRATED CIRCUITS
DATA SHEET
PCD5002A
Enhanced Pager Decoder for
APOC1/POCSAG
Product specification
File under Integrated Circuits, IC17
1999 Jan 08
Philips Semiconductors
Enhanced Pager Decoder for
APOC1/POCSAG
CONTENTS
1 FEATURES
2 APPLICATIONS
3 GENERAL DESCRIPTION
4 ORDERING INFORMATION
5 LICENSE
6 BLOCK DIAGRAM
7 PINNING
8 FUNCTIONAL DESCRIPTION
8.1 Introduction
8.2 The POCSAG paging code
8.3 The APOC1 paging code
8.4 Error correction
8.5 Operating states
8.6 ON status
8.7 OFF status
8.8 Reset
8.9 Bit rates
8.10 Oscillator
8.11 Input data processing
8.12 Battery saving
8.13 POCSAG synchronization strategy
8.14 APOC1 synchronization strategy
8.15 Call termination
8.16 Enhanced call termination
8.17 Call data output format
8.18 Error type indication
8.19 Data transfer
8.20 Continuous data decoding
8.21 Receiver and oscillator control
8.22 Demodulator quick charge
8.23 External receiver control and monitoring
8.24 Battery condition input
8.25 Synthesizer control
8.26 Serial microcontroller interface
8.27
Decoder I2C-bus access
8.28 External interrupt
8.29 Interrupt masking
8.30 Status/control register
8.31 Pending interrupts
8.32 Out-of-range indication
8.33 Real-time clock
8.34 Periodic interrupt
8.35 Received call delay
8.36 Alert generation
8.37 Alert cadence register (03H; write)
8.38 Acoustic alert
8.39 Vibrator alert
8.40 LED alert
1999 Jan 08
Product specification
PCD5002A
8.41
8.42
8.43
8.44
8.45
8.46
8.47
8.48
8.49
8.50
8.51
8.52
8.53
8.54
8.55
8.56
8.57
8.58
8.59
8.60
8.61
8.62
8.63
8.64
Warbled alert
Direct alert control
Alert priority
Cancelling alerts
Automatic POCSAG alerts
SRAM access
RAM write address pointer (06H; read)
RAM read address pointer (08H; read/write)
RAM data output register (09H; read)
EEPROM access
EEPROM address pointer (07H; read/write)
EEPROM data I/O register (0AH; read/write)
EEPROM access limitations
EEPROM read operation
EEPROM write operation
Invalid write address
Incomplete programming sequence
Unused EEPROM locations
Special programmed function allocation
Synthesizer programming data
Identifier storage allocation
Voltage doubler
Level-shifted interface
Signal test mode
9 OPERATING INSTRUCTIONS
9.1 Reset conditions
9.2 Power-on reset circuit
9.3 Reset timing
9.4 Initial programming
10 LIMITING VALUES
11 DC CHARACTERISTICS
12 DC CHARACTERISTICS (WITH VOLTAGE
CONVERTER)
13 OSCILLATOR CHARACTERISTICS
14 AC CHARACTERISTICS
15 APPLICATION INFORMATION
16 PACKAGE OUTLINE
17 SOLDERING
17.1 Introduction to soldering surface mount
packages
17.2 Reflow soldering
17.3 Wave soldering
17.4 Manual soldering
17.5 Suitability of surface mount IC packages for
wave and reflow soldering methods
18 DEFINITIONS
19 LIFE SUPPORT APPLICATIONS
20 PURCHASE OF PHILIPS I2C COMPONENTS
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