|
ON Semiconductor |
Order this document by SG3525A/D
Pulse Width
Modulator Control Circuits
The SG3525A, SG3527A pulse width modulator control circuits offer
improved performance and lower external parts count when implemented for
controlling all types of switching power supplies. The on–chip +5.1 V
reference is trimmed to ±1% and the error amplifier has an input
common–mode voltage range that includes the reference voltage, thus
eliminating the need for external divider resistors. A sync input to the
oscillator enables multiple units to be slaved or a single unit to be
synchronized to an external system clock. A wide range of deadtime can be
programmed by a single resistor connected between the CT and Discharge
pins. These devices also feature built–in soft–start circuitry, requiring only an
external timing capacitor. A shutdown pin controls both the soft–start circuitry
and the output stages, providing instantaneous turn off through the PWM
latch with pulsed shutdown, as well as soft–start recycle with longer
shutdown commands. The under voltage lockout inhibits the outputs and the
changing of the soft–start capacitor when VCC is below nominal. The output
stages are totem–pole design capable of sinking and sourcing in excess of
200 mA. The output stage of the SG3525A features NOR logic resulting in a
low output for an off–state while the SG3527A utilized OR logic which gives a
high output when off.
• 8.0 V to 35 V Operation
• 5.1 V ± 1.0% Trimmed Reference
• 100 Hz to 400 kHz Oscillator Range
• Separate Oscillator Sync Pin
• Adjustable Deadtime Control
• Input Undervoltage Lockout
• Latching PWM to Prevent Multiple Pulses
• Pulse–by–Pulse Shutdown
• Dual Source/Sink Outputs: ±400 mA Peak
Representative Block Diagram
16
Vref
15
VCC
12
Ground
4
OSC Output
Sync
RT
CT
Discharge
3
6
5
7
Compensation
INV. Input
Noninv. Input
CSoft–Start
9
1
2
8
10
Shutdown
Reference
Regulator
Oscillator
–Error
Amp
+
5.0k
To Internal
Circuitry
Under–
Voltage
Lockout
Q
F/F Q
+
– PWM
–
50µA
R
S
Latch
S
VREF
5.0k
VC
13
Output A
NOR 11
NOR 14
Output B
SG3525A Output Stage
13
VC
Output A
OR 11
Output B
OR 14
SG3527A
Output Stage
SG3525A
SG3527A
PULSE WIDTH MODULATOR
CONTROL CIRCUITS
SEMICONDUCTOR
TECHNICAL DATA
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648
16
1
DW SUFFIX
PLASTIC PACKAGE
CASE 751B
(SO–16L)
PIN CONNECTIONS
Inv. Input 1
Noninv. Input 2
Sync 3
OSC. Output 4
CT 5
RT 6
Discharge 7
Soft–Start 8
16 Vref
15 VCC
14 Output B
13 VC
12 Ground
11 Output A
10 Shutdown
9 Compensation
(Top View)
ORDERING INFORMATION
Device
Operating
Temperature Range Package
SG3525AN
Plastic DIP
SG3525ADW TA = 0° to +70°C
SG3527AN
SO–16L
Plastic DIP
MOTOROLA ANALOG IC DEVICE DATA
© Motorola, Inc. 1996
Rev 2
1
SG3525A SG3527A
MAXIMUM RATINGS (Note 1)
Rating
Symbol
Value
Unit
Supply Voltage
Collector Supply Voltage
Logic Inputs
VCC
VC
+40
+40
–0.3 to +5.5
Vdc
Vdc
V
Analog Inputs
Output Current, Source or Sink
Reference Output Current
Oscillator Charging Current
–0.3 to VCC
V
IO
±500
mA
Iref 50 mA
5.0 mA
Power Dissipation (Plastic & Ceramic Package)
TA = +25°C (Note 2)
TC = +25°C (Note 3)
PD
Thermal Resistance Junction–to–Air
RθJA
Thermal Resistance Junction–to–Case
RθJC
Operating Junction Temperature
TJ
Storage Temperature Range
Tstg
Lead Temperature (Soldering, 10 seconds)
TSolder
NOTES: 1. Values beyond which damage may occur.
2. Derate at 10 mW/°C for ambient temperatures above +50°C.
3. Derate at 16 mW/°C for case temperatures above +25°C.
1000
2000
100
60
+150
–55 to +125
+300
mW
°C/W
°C/W
°C
°C
°C
RECOMMENDED OPERATING CONDITIONS
Characteristics
Supply Voltage
Collector Supply Voltage
Output Sink/Source Current
(Steady State)
(Peak)
Reference Load Current
Oscillator Frequency Range
Oscillator Timing Resistor
Oscillator Timing Capacitor
Deadtime Resistor Range
Operating Ambient Temperature Range
Symbol
VCC
VC
IO
Iref
fosc
RT
CT
RD
TA
Min
8.0
4.5
0
0
0
0.1
2.0
0.001
0
0
Max
35
35
±100
±400
20
400
150
0.2
500
+70
Unit
Vdc
Vdc
mA
mA
kHz
kΩ
µF
Ω
°C
APPLICATION INFORMATION
Shutdown Options (See Block diagram, front page)
Since both the compensation and soft–start terminals
(Pins 9 and 8) have current source pull–ups, either can
readily accept a pull–down signal which only has to sink a
maximum of 100 µA to turn off the outputs. This is subject to
the added requirement of discharging whatever external
capacitance may be attached to these pins.
An alternate approach is the use of the shutdown circuitry
of Pin 10 which has been improved to enhance the available
shutdown options. Activating this circuit by applying a
positive signal on Pin 10 performs two functions: the PWM
latch is immediately set providing the fastest turn–off signal to
the outputs; and a 150 µA current sink begins to discharge
the external soft–start capacitor. If the shutdown command is
short, the PWM signal is terminated without significant
discharge of the soft–start capacitor, thus, allowing, for
example, a convenient implementation of pulse–by–pulse
current limiting. Holding Pin 10 high for a longer duration,
however, will ultimately discharge this external capacitor,
recycling slow turn–on upon release.
Pin 10 should not be left floating as noise pickup could
conceivably interrupt normal operation.
2 MOTOROLA ANALOG IC DEVICE DATA
|