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S42WD61PBS 반도체 회로 부품 판매점

Dual Voltage Supervisory Circuit With Watchdog Timer



ETC 로고
ETC
S42WD61PBS 데이터시트, 핀배열, 회로
S4242/S42WD42/S4261/S42WD61
Dual Voltage Supervisory Circuit
With Watchdog Timer(S42WD61) (S42WD42)
FEATURES
• Precision Dual Voltage Monitor
– VCC Supply Monitor
- Dual reset outputs for complex
microcontroller systems
- Integrated memory write lockout function
- No external components required
• Second Voltage Monitor Output
– Separate VLOW output
– Generates interrupt to MCU
– Generates RESET for dual supply systems
- Guaranteed output assertion to VCC - 1V
• Watchdog Timer (S42WD42, S42WD61)
– 1.6s
• Memory Internally Organized 2 x8
• Extended Programmable Functions
Available on SMS24
• High Reliability
– Endurance: 100,000 erase/write cycles
– Data retention: 100 years
OVERVIEW
The S42xxx are a precision power supervisory circuit. It
automatically monitors the device’s VCC level and will
generate a reset output on two complementary open drain
outputs. In addition to the VCC monitoring, the S42xxx also
provides a second voltage comparator input. This input
has an independent open drain output that can be wire-
OR’ed with the RESET I/O or it can be used as a system
interrupt.
The S42xxx also has an integrated 4k/16k-bit nonvolatile
memory. The memory conforms to the industry standard
two-wire serial interface. In addition to the reset circuitry,
the S42WD42/S42WD61 also has a watchdog timer.
BLOCK DIAGRAM
VCC
8
SCL 6
SDA 5
NONVOLATILE
MEMORY
ARRAY
WRITE
CONTROL
PROGRAMMABLE
RESET PULSE
GENERATOR
2 RESET#
+
VSENSE 3
1.26V
4
GND
+
VTRIP
RESET
CONTROL
PROGRAMMABLE
WATCHDOG
TIMER
(S42WD42,
S42WD61)
UV
OV
2025 T BD 2.0
7 RESET
1 VLOW#
SUMMIT MICROELECTRONICS, Inc. • 300 Orchard City Drive, Suite 131 • Campbell, CA 95008 • Telephone 408-378-6461 • Fax 408-378-6586 • www.summitmicro.com
© SUMMIT MICROELECTRONICS, Inc. 2000
2025 6.0 4/17/00
Characteristics subject to change without notice
1


S42WD61PBS 데이터시트, 핀배열, 회로
S4242/S42WD42/S4261/S42WD61
ABSOLUTE MAXIMUM RATINGS
Temperature Under Bias ............................................................................................................................... -40°C to +85°C
Storage Temperature ..................................................................................................................................... -65°C to +125°C
Soldering Temperature (less than 10 seconds) ................................................................................................................... 300°C
Supply Voltage ............................................................................................................................................................. 0 to 6.5V
Voltage on Any Pin ....................................................................................................................................... -0.3V to VCC+0.3V
ESD Voltage (JEDEC method) .......................................................................................................................................... 2,000V
NOTE: These are STRESS ratings only. Appropriate conditions for operating these devices are given elsewhere in this specification. Stresses
beyond those listed here may permanently damage the part. Prolonged exposure to maximum ratings may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Temperature
Commercial
Min
0°C
Max
+70°C
Industrial
-40°C
+85°C
2025 PGM T1.0
DC ELECTRICAL CHARACTERISTICS (over recommended operating conditions unless otherwise specified)
Symbol
Parameter
Conditions
Min Max Units
SCL = CMOS Levels @ 100KHz
VCC =5.5V
ICC
Supply Current (CMOS)
SDA = Open
All other inputs = GND or VCC
VCC =3.3V
ISB Standby Current (CMOS) SCL = SDA = VCC
All other inputs = GND
VCC =5.5V
VCC =3.3V
ILI Input Leakage
VIN = 0 To VCC
3 mA
2 mA
50 µA
25 µA
10 µA
ILO Output Leakage
VOUT = 0 To VCC
VIL Input Low Voltage SCL, SDA, RESET# (pin 2)
10
0.3xVCC
µA
V
VIH Input High Voltage SCL, SDA, RESET (pin7)
0.7xVCC V
VOL
Output Low Voltage
IOL = 3mA SDA
AC ELECTRICAL CHARACTERISTICS
(over recommended operating conditions unless otherwise specified)
2.7V to 4.5V
0.4 V
2025 PGM T2.0
4.5V to 5.5V
Symbol
Parameter
Conditions
Min Max Min Max Units
fSCL
tLOW
tHIGH
tBUF
tSU:STA
tHD:STA
tSU:STO
tAA
tDH
tR
tF
tSU:DAT
tHD:DAT
TI
tWR
2025 6.0 4/17/00
SCL Clock Frequency
Clock Low Period
Clock High Period
Bus Free Time
Start Condition Setup Time
Start Condition Hold Time
Stop Condition Setup Time
Clock to Output
Data Out Hold Time
SCL and SDA Rise Time
SCL and SDA Fall Time
Data In Setup Time
Data In Hold Time
Noise Spike Width
@ SCL, SDA Inputs
Write Cycle Time
Before New Transmission
SCL Low to SDA Data Out Valid
SCL Low to SDA Data Out Change
Noise Suppression Time Constant
2
0 100
4.7 1.3
4.0 0.6
4.7 1.3
4.7 0.6
4.0 0.6
4.7 0.6
0.3 3.5 0.2
0.3 0.2
1000
300
250 100
00
100
400 KHz
µs
µs
µs
µs
µs
µs
0.9 µs
µs
300 ns
300 ns
ns
ns
100 ns
10 10 ms
2025 PGM T3.0




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