DSP56364D 반도체 회로 부품 판매점
24-Bit Audio Digital Signal Processor
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 Motorola Inc |
Freescale Semiconductor, Inc.
Advance Information
DSP56364/D
Rev. 3.2, 08/2003
24-Bit Audio Digital
Signal Processor
Topic
Page
Overview ..................................... i
Features .................................... ii
Signal/Connection
Descriptions .......................1-1
Specifications ..........................2-1
Packaging ...............................3-1
Design Considerations ...........4-1
Ordering Information ...............5-1
IBIS Model ............................. A-1
Overview
The DSP56364 supports digital audio applications requiring sound field processing,
acoustic equalization, and other digital audio algorithms. The DSP56364 uses the
high performance, single-clock-per-cycle DSP56300 core family of programmable
CMOS digital signal processors (DSPs) combined with the audio signal processing
capability of the Motorola Symphony™ DSP family, as shown in Figure 1. This
design provides a two-fold performance increase over Motorola’s popular
Symphony family of DSPs while retaining code compatibility. Significant
architectural enhancements include a barrel shifter, 24-bit addressing, instruction
cache, and direct memory access (DMA). The DSP56364 offers 100 million
instructions per second (MIPS) using an internal 100 MHz clock at 3.3 V.
Data Sheet Conventions
This data sheet uses the following conventions:
OVERBAR
Used to indicate a signal that is active when pulled low (For
example, the RESET pin is active when low.)
“asserted”
Means that a high true (active high) signal is high or that a low
true (active low) signal is low
“deasserted” Means that a high true (active high) signal is low or that a low
true (active low) signal is high
Examples:
Signal/
Symbol
Logic State Signal State Voltage*
PIN
True
Asserted
VIL / VOL
PIN
False
Deasserted
VIH / VOH
PIN
True
Asserted
VIH / VOH
PIN
False
Deasserted
VIL / VOL
Note: *Values for VIL, VOL, VIH, and VOH are defined by individual product
specifications.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
IMOTOROLA
DSP56364 Advance Information
1
For More Information On This Product,
Go to: www.freescale.com
Overview
Features
Freescale Semiconductor, Inc.
4 12
5
GPIO
ESAI
PERIPHERAL
EXPANSION
AREA
ADDRESS
GENERATION UNIT
SIX CHANNELS
DMA UNIT
INTERNAL
DATA BUS
SWITCH
PLL
CLOCK
PROGRAM
INTERRUPT
CONT
SHI
24-BIT
DSP56300
CORE
PROGRAM RAM
0.5K x 24
PROGRAM ROM
8K x 24
Bootstrap ROM
192 x 24
X
MEMORY
RAM
1K X 24
YAB
XAB
PAB
DAB
Y
MEMORY
RAM
1.5K X 24
MEMORY
EXPANSION
AREA
EXTERNAL
ADDRESS BUS
SWITCH
ADDRESS
18
DRAM & SRAM
BUS
INTERFACE
CONTROL
6
DDB
YDB
XDB
PDB
GDB
EXTERNAL
DATABUS
SWITCH
DATA
8
PROGRAM
DECODE
CONT
PROGRAM
ADDRESS
GEN
DATA ALU
24 X 24+56→56-BIT MAC
TWO 56-BIT
ACCUMULATORS
BARREL SHIFTER
POWER
MGMT
JTAG
OnCE™
4
EXTAL
RESET
PINIT/NMI
MODA/IRQA
MODB/IRQB
MODD/IRQD
24 BITS BUS
Figure 1 DSP56364 Block Diagram
1 Features
1.1 Digital Signal Processing Core
• 100 Million Instructions Per Second (MIPS) with an 100 MHz clock at 3.3V.
• Object Code Compatible with the 56000 core.
• Data ALU with a 24 x 24 bit multiplier-accumulator and a 56-bit barrel shifter. 16-bit arithmetic support.
• Program Control with position independent code support and instruction cache support.
• Six-channel DMA controller.
• PLL based clocking with a wide range of frequency multiplications (1 to 4096), predivider factors (1
to 16) and power saving clock divider (2i: i=0 to 7). Reduces clock noise.
• Internal address tracing support and OnCE for Hardware/Software debugging.
2
DSP56364 Advance Information
MOTOROLA
For More Information On This Product,
Go to: www.freescale.com
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DSP56364
24-Bit Audio Digital Signal Processor - Motorola Inc
DSP56364D
24-Bit Audio Digital Signal Processor - Motorola Inc